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AM263P4: RTI

Sudhakar Elumalai Dhanasekar
Prodigy 195 points
Part Number: AM263P4
Other Parts Discussed in Thread: SYSCONFIG

Hi,

1. In TRM under section 13.5.1.1.1 RTI Features, it is mentioned as


"Two independent 64 bit counter blocks (counter block0 or counter block1). Each block consists of

  • One 32 bit up counter
  • One 32 bit free running counter"

Is it possible to combine both counter and use as single 64bit counter.


2. In the CCS, under RTI configuration section for "Tick Period (usecs)" it is mentioned as "Timer tick period in units of usecs. Must be  greater than equal to 1 and less than equal to 1000000" 

I'm interested in finding, what is the maximum time interval I can able to generate interrupt using RTI, by configuring the compare block to generate event at particular period.

For example if I'm configuring 32bit timer with 1MHz and timer counter will increment for each 1us(1/1MHz). So maximum possible time interval, to generate an event is  [1us * (2^32)] => [1us * 4,294,967,295] => 4,294.96 secs, for this I need to configure the Period to  4,294,967,295 but in the CCS Tick Period (usecs) showing in the unit of usecs and maximum value showing is 1000000us (which is one sec).

So the maximum possible event generation is one sec only Or What if I need to configure the event generation for every 100sec or maximum possible ?

  • 0
    Mastermind 8845 points
    Sudhakar Elumalai Dhanasekar said:
    I'm interested in finding, what is the maximum time interval I can able to generate interrupt using RTI,

     I think a big impact is the input frequency. Consider reducing it to from 192MHz to 25MHz by selecting WUCPUCLK. This would increase your range by a factor of 7 times. (192/25) without much effort.

    Is there a resolution requirement of 5.2ns (1/192MHz)? I think that's unusually fine.

  • 0 in reply to Kier
    Prodigy 195 points

    Hi Kier,

    Even if I reduce the frequency to 25MHz, Maximum configurable Tick Period (usecs) is showing 1000000(usec) [i.e 1sec] still the same as 192MHz.

  • 0 in reply to Sudhakar Elumalai Dhanasekar
    Mastermind 8845 points

    A tick period of 1s is also unusualy high. Incrementing even a 32bit timer once every second, gives you a period of 136 years!

    Perhaps you should set out your objectives?

  • 0 in reply to Kier
    Prodigy 195 points

    I'm exploring, what is the maximum period I can be able to configure using CCS, but it is limited to 1sec always. I'm just wondering what if I need to configure let say for 5sec or 10sec, how that can be achieve using CCS !

  • +1 in reply to Sudhakar Elumalai Dhanasekar
    Mastermind 8845 points

    Right, I see the problem.

    a) The name of the field is misleading. 'Tick Period' is interpreted (by me) to be period of the timer input clock, but I see now TI intend it to be "Time-out" (load) value of the Compare Event.

    b) You can ignore the warning in SYSCONFIG, it's obviously wrong. Go ahead and input 10,000,000 into that field. You should get a 10s interrupt period.

  • 0 in reply to Kier
    TI__Guru 54905 points

    Hi Sudhakar and Kier,

    In theory, you can put a large number in the Tick Period. It is only limited by the input clock frequency and the 32-bit timer counter. For example, if the input clock is 25Mhz, then the 32-bit counter can only last for about 171 sec (2^32/25000000 = 171) before overflow.

    In practice, we usually put a reasonable number in the Tick Period, such as 1000us (1ms) or 10000 (10ms), then use the Timer ISR to keep track of the number of ticks elapsed. The Timer ISR can decide what to do at certain number of ticks passed. 

    Best regards,

    Ming