AM2434: Using cp14 to operate debug related registers will result in an undefined exception

Hi There,

We will need to the help from our system architect to answer your questions. It may take a few days for us to come back to you on this thread.

Best regards,

Ming

Hi Lin,

Here is the answer from our system architect: 

1. CP14 is a valid means of accessing V7R debug registers, but there are rules associated with this that are documented in the V7R Architecture Reference Manual.  From the behavior noted in the E2E post I’m guessing that the code was not executed with a privilege level of PL1 or higher (which is required per the ARMv7-R.
2. TI does support a memory mapped view of the registers, so this can be used as a means of accessing them:

Note that access to the debug resources is also affected by the security state of the device.

Best regards,

Ming

I have checked that the code was executed in system mode, which is PL1 with a privilege level of PL1. But undefined exception still occurs.

Hi Lin,

Can you provide the code which generates  the undefined exception?

Best regards, 

Ming

As the picture shows, when writing DBGDSCRext with MCR , it is in system mode. Once the code is executed, it enters an undefined exception as the following picture shows.

Hi Lin,

I passed your information to our system architects. While waiting for their answer back, can I ask wa=hat is the reason you want to access to the CP14 registers? Are you developing your own debugger?

Best regards,

Ming

Hi Lin,

Here are the comments from our system architects:

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I have a few comments—and, again, I am really just reading the arm documentation. If this drags on then we may need to refer customer to ARM support.

1. The code snippets show debugging of code that is writing to CP14 registers within the context of an active CCS debugger session.  The CCS drivers will be using the same registers to manage the debug session and updating those registers may introduce instability in the debug session and result in undefined behavior. 
   1. Please request information about what the customer is trying to do.
   2. Regarding accesses to DBGSCRext—is there a reason why this is desired over DBGSCRint?
   3. Per the Arm documentation, there are several criteria that must be met (please review v7 Arm Architecture Reference Manual (ARM) documentation for details).  One of those checks is: If DBGPRSR.SPD=1 then access to certain registers becomes undefined (this register should be readable though).  Please check this. 
   4. Per R5 TRM, there is a lock mechanism that will prevent writes to debug registers (see DBGLSR, DBGLAR) that will be relevant if you were to run outside of the CCS context.

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Best regards,

Ming

As your system architect says, I run the code without CCS debugger, but the undefined exception still happens, so I think the undefined exception isn't resulted in by the CCS debugger environment. 

a. What we are trying to do is to write our own code to implement debugging functions. So we should implement it with the help of some debug registers.

b. Because DBGDSCRint is RO, and we need write DBGDSCR. Then the DBGDSCRext is RW, so we want to access DBGSCRext.

c. d   I also find these requirements.  I also want to check the DBGPRSR.SPD and DBGLSR. But as the code in the following picture shows, reading the DBGPRSR and DBGLSR still result in the undefined exception. 

So I have no idea to deal with this problem. Please tell me how to program in detail instead of guessing based on the manual. Thanks.

Hi Lin,

I did try to read/write to the registers listed in Table C 6-3. Only the read of register 0, 1, 5 worked. I have sent an email out to wider audience for help. It may take a few days to get answer back. Thank you so much for your patience.

Best regards,

Ming