MSPM0G3507: MEMRESIFG bit not cleared as expected

Hello,

I've had issues with the ADC getting the status of a conversion finished. I was reading the MEMRESIFG bits from the CPU_INT.RIS register for the channels I care about, to know when a conversion on a channel finished, via DL_ADC12_getRawInterruptStatus(). Then I would read the result of the conversion with DL_ADC12_getMemResult(), which according to the TRM should clear the MEMRESIFG bit. However this does not happen. Bit remains set and next conversion gives me an invalid value because MEMRESIFG is already set when starting next conversion, so my SW ends it prematurely.

I looked at adc12_single_conversion SDK example which works correctly, because it uses DL_ADC12_getPendingInterrupt() and not DL_ADC12_getRawInterruptStatus(), so it seems the bit is cleared as soon as IIDX register is read. However I cannot use that in my application since it won't always give me the status of the exact channel that I want depending on the state of the system. I modified the SDK example to use DL_ADC12_getRawInterruptStatus() instead, and sure enough, the MEMRESIFG bit is never cleared when reading the converison result register.

See below the modified SDK example to reproduce this:

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#include "ti_msp_dl_config.h"

volatile bool gCheckADC;
volatile uint16_t gAdcResult;

int main(void)
{
    SYSCFG_DL_init();

    NVIC_EnableIRQ(ADC12_0_INST_INT_IRQN);
    gCheckADC = false;

    while (1) {
        DL_ADC12_startConversion(ADC12_0_INST);

        while (false == gCheckADC) {
            __WFE();
        }

        gAdcResult = DL_ADC12_getMemResult(ADC12_0_INST, DL_ADC12_MEM_IDX_0);

        if (gAdcResult > 0x7ff) {
            DL_GPIO_clearPins(GPIO_LEDS_PORT, GPIO_LEDS_USER_LED_1_PIN);
        } else {
            DL_GPIO_setPins(GPIO_LEDS_PORT, GPIO_LEDS_USER_LED_1_PIN);
        }
        gCheckADC = false;
        DL_ADC12_enableConversions(ADC12_0_INST);
    }
}

void ADC12_0_INST_IRQHandler(void)
{
    switch (DL_ADC12_getRawInterruptStatus(ADC12_0_INST, DL_ADC12_INTERRUPT_MEM0_RESULT_LOADED)) {
        case DL_ADC12_INTERRUPT_MEM0_RESULT_LOADED:
            gCheckADC = true;
            break;
        default:
            break;
    }
}

Can you please confirm if you see this behavior on TI side?

Thank you,

Florin