This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSPM0L1306: UART RXTO regardless of FIFO state

Part Number: MSPM0L1306

Hello,

I have a customer who's trying to take advantage of the RXTO counter in the UART. Based on what the TRM states "The receive timeout interrupt is asserted when the receive FIFO is not empty, and no further data is received specified time in the IFLS.RXTOSEL bits" 

Is there a way to use the counter if the fifo is empty? The customer is out of timer channels so cannot simply use a timer after an RXINT. Ideally they would be able to have an RTOUT interrupt any time a byte hasn't been received in a certain number of BRCLKs.

Munan

  • Hello Munan,

    The RXTO is used to check if UART transmission has ended. It requires that the RX FIFO must be not empty to avoid repeatedly entering timeout interrupt when there is not UART transmission. If customer want to use the RX timeout function, there is one recommended method:

    1). Set the RX FIFO threshold level >=2 entries (when receive >=2 entries, it will trigger interrupt. You can read one byte data and leave one byte data in the FIFO);

    2). Set the specified time of RXTO; 

    3). When the RX timeout interrupt is triggered, we know that the UART transmission is ended,

    4). In the RX timeout interrupt, you can read out the last one byte data from the RX FIFO. And remember to clear the timeout interrupt flag.

    However, if customer insists on using a counter when the FIFO is empty, he can consider using the "SYSTICK". You can find the descriptions about the "SYSTICK" in the TRM.

    Best Regards,

    Janz Bai