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AM263P4: Standby vs Core Clock Disable

Part Number: AM263P4
Other Parts Discussed in Thread: SYSCONFIG

Hi,

1. Is putting micro into sleep and disabling that particular core clock is same ? Which is recommended !

2. What is the use case of the below mentioned clock source configuration ? When enabling the clock gate of RTI1 the core1 stops working. Why this behaviour ? (similar behaviour in other core as well)
 

  • Hi,

    1) Clock gating a particular core clock is different from putting core to available low power states.

        Please refer to 6.2.2.5 Device Power States section in TRM (SPRUJ55 – JULY 2023 – REVISED SEPTEMBER 2023). 

        In general if both are enabled then that gives better power saving. But it depends on application needs at system level. We may need to understand more about the application         here.

    2) I am not sure I understood the problem completely. Can you please share more details on what is that you are trying ? Please share complete sysconfig and when you say it             stops working what happens ? Do you have logs ? Are you running application on core0/1 etc ?

    Best Regards, Shiv

  • Hi,

    2) I am not sure I understood the problem completely. Can you please share more details on what is that you are trying ? Please share complete sysconfig and when you say it             stops working what happens ? Do you have logs ? Are you running application on core0/1 etc ?

    Actually I was using ClockP_Sleep API which uses RTI as source, before going to sleep I was enable the clock gate for RTI and ClockP_Sleep function call was happening which makes the core hang, instead for ClockP_Sleep API, I tried using delay using for loop, Then it worked.

  • For Core to go to WFI state there should not be any Interrupts pending, If that condition is met the Core can go to WFI. So if the ClockP_Sleep uses RTI and uses interrupts then core wont hit WFI.

    Best Regards, Shiv

  • Hi Sudhakar,

    Please let us know if you get chance to review the answers I posted above and need further clarification.

    Best regards, Shiv