AM2634-Q1: Can PRU access to EPWM/ADC/CAP, etc. peripherals in the chip?

Part Number: AM2634-Q1

Hi BU experts, 

it is said in TRM that: 

Each of the PRU cores can access the rest of the device memory (including memory mapped peripheral and configuration registers) using the global memory space addresses

I want to confirm with you that if that means the 2 PRU cores can access the ADC/EPWM/CAP, etc. peripherals in the chip? 

Regards, 

Will