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AM2432: ■SORTE_G, interrupt event does not occur from device to application

Part Number: AM2432

■SORTE_G, デバイスからアプリケーションに割り込みイベントがあがらない
 デバイスで設定した割り込みイベントがアプリケーションで受信できません。
 不足している設定はありますでしょうか?

■SORTE_G, interrupt event does not occur from device to application
The application cannot receive the interrupt event set on the device.

Are there any settings that are missing?

  • Hi Suzuki-san,

    We will try to replicate the failing scenario. Just to confirm: Are you using the latest SORTE_G example from the GIT server located here? https://git.ti.com/cgit/pru-software-support-package/pru-software-support-package/

    Regards,

     Thomas

  • Hi  Mr.Thomas

    Yes.

  • Hi Suzuki-san,

    We have replicated the scenario and found the following two issues.

    1. The PRU sends the wrong event/interrupt to the INTC of the ARM processor.

    2. The ARM interrupt handler is not called when PRU host event (#120) is pending.

    Fix regarding (1): Please change in the file irq_num.inc in the include\protocol folder value of IRQ_OUT_DATA_READY to 32.

    IRQ_OUT_DATA_READY      .set    32

    After this change we see in the INTC register of ICSS that PRU event #16 (pr0_pru_mst_intr[0]_intr_req) is triggered and pending. Now the INTC of the ARM should pickup this event and call the event handler. But this is not happening, therefore I created item (2)

    I have no good fix for (2) at the moment. The code we have to register the interrupt 120 seems legit, but for some unknown reason it is not executed. I will ask the processor product group support to look why the interrupt is not called. They will follow up in this form entry.

    Regards,

     Thomas

  • Hi EP MCU SDK team,

    We are creating an interrupt handler on R5F like follows.

    // mapping of PRU INTC host interrupts to ARM R5F interrupt
    // host0 = 120
    // ...
    // host7 = 127
    intrNum = 120;
    /* Register PRU interrupt */
    HwiP_Params_init(&hwiPrms);
    hwiPrms.intNum = intrNum;
    hwiPrms.callback = (void *) &PRU_IsrFxn;
    HwiP_construct(&gPRUHwiObject, &hwiPrms);

    static void PRU_IsrFxn()
    {
    int status;
    status = PRUICSS_clearEvent(gPruIcss0Handle, 16); // 16 is PRU0 intr[0]
    }

    The INTC of ICSS has received a pending host event. But for some reason the ISR on ARM is not called. Can you kindly look into that, have we configured something in the wrong way? Does the INTC of ARM requires some additional configuration in SYSCFG? Let me know if you need additional information.

    Regards,

     Thomas

  • Hi  Mr.Thomas

    OK.

    >I will ask the processor product group support to look why the interrupt is not called.
    We look forward to hearing back from processor product group.

  • thank you very much.

    Close this question.

  • Hi Suzuki-san,

    Let me follow up on the missing ARM interrupt.

    The reason why the current SORTE_G version was not able to receive an R5F interrupt was, that we mapped the wrong INTC host interrupt number to the ICSSG1 event. The interrupt from 120 to 127 belong to ICSSG0. For SORTE_G on AM243x/AM64x, the protocol operates on ICSSG1

    // old code

    // mapping of PRU INTC host interrupts to ARM R5F interrupt
    // host0 = 120
    // ...
    // host7 = 127

    intrNum = 120;

    You need to change the interrupt number of intrNum from 120 to 248.

    intrNum          = 248; //PRU_ICSSG1_PR1_HOST_INTR_PEND_0

    Regards,

     Thomas