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AM2634: PRU-ICSS MDIO_POLL_EN_REG register offset?

Part Number: AM2634
Other Parts Discussed in Thread: AM2631

Hi,

I'm writing a bare metal program that uses the PRU-ICSS MII_MDIO module to make a manual transactions. I'd like to disable automatic polling for all PHY addresses.

I've read this from section 7.2.11.2.3 from the AM2631 technical reference manual Rev E
> Individual PHY's can be enabled or disabled for polling through the associated bit in the MDIO MDIO_POLL_EN_REG register.

However, in the Register Addendum Rev D., I don't see the MDIO_POLL_EN_REG register listed:

I've also checked the CSL_IcssMiiMdioRegs structure in source/networking/enet/hw_include/icss/V1/cslr_icss_mii_mdio.h from MCU+SDK 09.01.00 and didn't see that register listed.

Could I have advice on how to access this register if it exists in this module, or another way to disable polling on the module?


Thank you,

-Andy

  • Hello Andy,

    I apologize for the confusion. I will file a ticket to add that register to the TRM register addendum. In the mean time, the address of the MDIO POLL Enable register on the AM263x devices is: 0x48032438

    The Reset value is 0xFFFFFFFF

    When set, the bit indicates that the associated PHY will be included in polling operations. When clear, the associated PHY will not be polled. Each bit in this field is associated with a PHY (bit zero being PHY0 and so on). 

    Regards,

    Erik

  • I found the register using the 0xFFFFFFFF reset value. I ended up finding it at 0x48032438 which is a slightly different address, but that's fine - this register works as described.
    Thank you for the quick reply.

  • Hello Andy,

    My apologies for linking the wrong address. I have updated the original post to reflect the correct address.

    Regards,

    Erik