MSPM0L1306: Spike on I2C SDA line after ACK bit

Hi Cesar,

There is nothing you can do to remedy this spikes.

Referring back to the earlier posting, Brent is correct.  If you look closely at your timing diagram, you will notice the spikes occur only on the "falling" edge of the SCL.  According to the I2C specification, the SDA must be stable just before (ns) the rise of the SCL, and must remain stable until the falling edge.  Since these spikes occur after the SCL falling edge, devices that are I2C compliant should not be affected by them.   With your logic probe, try zooming in as far as possible and measure the time from the SCL falling edge to the spike.  What do you measure?

Hi Dennis,

Thank you for your response here. 

I made the measure and the delta time from fall to rise is ~50.3220ųs

Let me know if more details are needed.

Hi Dennis,

Thank you for your response here. 

I made the measure and the delta time from fall to rise is ~50.3220ųs

Let me know if more details are needed.