Re: No connection to evaluation board after performing TMS570 - cpu-selftest

Hi Fumin,

Please use chapter 9 (STC module) in TRM SPNU489B as guide to program STC.  http://www.ti.com/lit/ug/spnu489b/spnu489b.pdf. Chapter 9 has very detailed description about STC test flow and STC configuration.

Since STC will reset the CPU, you need to backup the CPU content before STC and restore them after STC test.

Here siis the example code to backup and restore the CPU content:

==================================================================

; Initialize Stack Pointers

    .global  _coreBackupStackPointer_
    .global  _coreRestoreStackPointer_
    .asmfunc

_coreBackupStackPointer_:

        ldr   r0,       r1_bkup       
        str   r1,       [r0]
        ldr   r0,       r2_bkup       
        str   r2,       [r0]

        msr   cpsr_c,   #0xD1
        ldr   r0,       fiq_bkup       
        str   sp,       [r0]
        msr   cpsr_c,   #0xD2
        ldr   r0,       irq_bkup
        str   sp,       [r0]
        msr   cpsr_c,   #0xD7
        ldr   r0,       abort_bkup
        str   sp,       [r0]
        msr   cpsr_c,   #0xDB
        ldr   r0,       undef_bkup
        str   sp,       [r0]
        msr   cpsr_c,   #0xDF
        ldr   r0,       user_bkup
        str   sp,       [r0]
        msr   cpsr_c,   #0xD3
        ldr   r0,       svc_bkup
        str   sp,       [r0]
        bx    lr

;    .endasmfunc

;-------------------------------------------------------------------------------
; Recover Stack Pointers

;    .global  _coreRestoreStackPointer_
;    .asmfunc

_coreRestoreStackPointer_:

        ldr   r0,       r1_bkup       
        ldr   r1,       [r0]
        ldr   r0,       r2_bkup       
        ldr   r2,       [r0]

        msr   cpsr_c,   #0xD1
        ldr   r0,       fiq_bkup       
        ldr   sp,       [r0]
        msr   cpsr_c,   #0xD2
        ldr   r0,       irq_bkup
        ldr   sp,       [r0]
        msr   cpsr_c,   #0xD7
        ldr   r0,       abort_bkup
        ldr   sp,       [r0]
        msr   cpsr_c,   #0xDB
        ldr   r0,       undef_bkup
        ldr   sp,       [r0]
        msr   cpsr_c,   #0xDF
        ldr   r0,       user_bkup
        ldr   sp,       [r0]
        msr   cpsr_c,   #0xD3
        ldr   r0,       svc_bkup
        ldr   sp,       [r0]
;
        bx    lr

user_bkup:   .word 0x08001000
svc_bkup:    .word 0x08001004
fiq_bkup:    .word 0x08001008
irq_bkup:    .word 0x0800100C
abort_bkup:  .word 0x08001010
undef_bkup:  .word 0x08001014
r0_bkup:     .word 0x08001018
r1_bkup:     .word 0x0800101C
r2_bkup:     .word 0x08001020

    .endasmfunc 
========================================================

Regards,

QJ

Hi

The backup example as I understand just backups the values of R0, R1, R2 registers and the Stack Pointer(R13).

How to use it with RTX-OS from Keil or FreeRTOS? should be made a complete backup of the context (R0-R15)??

Regards
Burim

Hi Burim,

Typically STC is run as iitialization during startup.  If it is ran on startup, we don't need save the CPU contents. Otherwise, user must save the CPU contents and reload them after test.  Following are some of the registers that are required to be backed up before and restored after self-test:

1. core registers (R0-R15, PC CPSR)

2. CP15

3. CP13

4. HW breakpoint.

To be honest, I didn't try it with FreeRTOS.

Regards,

QJ

Hi Burim,

Have you tried those backups in your OS? 

Regards,QJ