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AM2434: Power Supply Sequencing Timing Requirements

Part Number: AM2434

Power sequence requirements are described in the data sheet. Each power sequence diagram demonstrates the sequential order expected for each device power rail, but does not include specific timing requirements.

Are there no specified delay times between each power ramp up or down? Only the sequential order is specified?

Best regards,

Daisuke

  • Hello Daisuke

    Thank you for the query. 

    We do not have any time specified between 2 supplies except that the previous supply needs to be ramped and stable before the start of the next supply ramp.
    The sequence is required only to prevent potential differences.

    Regards,

    Sreenivasa

  • Sreenivasa-san,

    Thank you for your reply.

    There seems to be no sequential order between power supplies in the power-down sequencing.

    Is my understanding correct?

    Should MCU_PORz be asserted low before or at the same time as a power supply starts to ramp down?

    On our customer's board, 3.3V starts to ramp down before MCU_PORz is asserted low.

    Best regards,

    Daisuke

  • Hi Sreenivasa-san,

    I have additional questions.

    Power Supply Slew Rate Requirement is described in the data sheet. The maximum recommended slew rate of supplies is limited to less than 18 mV/µs.

    Is there the minimum slew rate limit of supplies?

    Does this limit also apply during power down?

    Best regards,

    Daisuke

  • Hello Daisuke

    Thank you for the inputs.

    Should MCU_PORz be asserted low before or at the same time as a power supply starts to ramp down?

    On our customer's board, 3.3V starts to ramp down before MCU_PORz is asserted low.

    The MCU_PORz should be low before the supply drops below the Recommended Operating Condition ROC.

    Can you please share the waveform.

    Regards,

    Sreenivasa

  • Hi Sreenivasa-san,

    Thank you for your reply.

    The EN of the PMIC (LP87334D) is controlled by a voltage detector on the 5V input, but there is an issue in which current regenerates from the output side to the 5V input side during shutdown. Our customer is looking into ways to avoid the issue.

    The MCU_PORz should be low before the supply drops below the Recommended Operating Condition ROC.

    I understand.

    If the PMIC is not controlled by EN, after the 5V input drops, 3.3V (Buck1) will drop first, so the purpose of the question was to check if that is acceptable.

    I have additional questions.

    Power Supply Slew Rate Requirement is described in the data sheet. The maximum recommended slew rate of supplies is limited to less than 18 mV/µs.

    Is there the minimum slew rate limit of supplies?

    Does this limit also apply during power down?

    Our customer wants to slow down the slew rate during power down and reduce the impact of the regenerated current from the output side to the 5V input side during shutdown.

    Could you please answer my additional questions?

    Best regards,

    Daisuke

  • Hello Daisuke

    Thank you for the inputs.

    Is there the minimum slew rate limit of supplies?

    As i understand, we do not have a minimum. slew defined.

    Does this limit also apply during power down?

    The Reset input need to be low during the ramp. There is no ramp down timing specified.

    Regards,

    Sreenivasa

  • Hi Sreenivasa-san,

    Thank you for your reply.

    Our customer will test to slow down the slew rate of Buck0/1 for the issue with power down.

    Best regards,

    Daisuke

  • Hello Daisuke

    Thank you for the note.

    Regards,

    Sreenivasa