TMS570LC4357: MIBSPI buffers in unexpected state

Part Number: TMS570LC4357

Hello,

I have created MIBSPI implementation for servicing external CAN controller. This implementation normally works without an issue. However, after 5-10 minutes transfer group which services incoming messages from CAN controller enters an unexpected state, which freezes the entire MIBSPI. The frequency of this issue seems to be reduced when I increase the priority of DMA channels used for MIBSPI (takes hours to get to this state).

Configuration of Transfer Groups:

// RX Transfer Group
// Leave it disabled, enable it as a last step of CAN controller config
spi_base->TGCTRL[current_group] = (uint32_T)((uint32_T)0U << 31U) // enable
                                                          | (uint32_T)((uint32_T)0U << 30U) // oneshot
                                                          | (uint32_T)((uint32_T)0U << 29U) // pcurrent reset
                                                          | (uint32_T)((uint32_T)TRG_LOW << 20U) // trigger event, Group triggered by RXEMPTY flag from CAN Controller via. GIOA
                                                          | (uint32_T)((uint32_T)TRG_GIOA0 << 16U) // trigger source
                                                          | (uint32_T)((uint32_T)0u << 8U); // start buffer

// Tx DMA Group
// Leave it disabled
spi_base->TGCTRL[current_group] = (uint32_T)((uint32_T)0U << 31U) // enable
                                                           | (uint32_T)((uint32_T)1U << 30U) // oneshot
                                                           | (uint32_T)((uint32_T)0U << 29U) // pcurrent reset
                                                           | (uint32_T)((uint32_T)TRG_LOW<< 20U) // trigger event Group triggered by TXFULL flag from CAN Controller via. GIOA
                                                           | (uint32_T)((uint32_T)TRG_GIOA1 << 16U) // trigger source
                                                           | (uint32_T)((uint32_T)8u<< 8U); // start buffer

MIBSPI enters the following unexpected state. For buffer=0 RXEMPTY is 0, which makes the MIBSPI stuck in RX transfer group (from LTGPEND register). This state occurs seemingly randomly after 5+ minutes. RX DMA is set to transfer RX data from buffers 0-7 to RAM.