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MSPM0L1305: Is it possible to have two independent protection cases at the same time?

Part Number: MSPM0L1305

Dear Champs,

I am asking this for our customer.

There is one COMP on this MCU, but the user wants to have two independent protection usages and generate their respective ISR.

Questions:

1. There is an internal 8-bit DAC that can be used for the COMP. And this can be used as one protection case. The user wonders if it possible to have another different internal DAC with OPA as another different protection? 

2. If not, the user uses an external circuit as negative threshold with our internal OPA or GPAMP. Is it OK?

3. The user uses the internal OPA/GPAMP and bring the output to a GPIO as external interrupt. We notice there is only one GPIO interrupt vector. If the user already uses another GPIO as the trigger source for this GPIO input interrupt vector and also use the GPIO from the OPA/GPAMP as another trigger source. Does it make sense? That is, is it possible to have several GPIO as the interrupt triggering source and the inside the ISR, the user can determine which GPIO to trigger this ISR?

4. Can ADC/OPA be used at the same time to save analog pin usage?

5. Can ADC/GPAMP be used at the same time to save analog pin usage?

  • Hi Wayne,

    1. There is an internal 8-bit DAC that can be used for the COMP. And this can be used as one protection case. The user wonders if it possible to have another different internal DAC with OPA as another different protection? 

    Internal DAC8 supports dual output voltage switch function, I think this can be used as dual protection. However, at the same time, it can only ouput one voltage level.

    MSPM0L130X only have one internal DAC, and it can output to OPA /GAMP for anotehr different protection, but there is no other comparator.

    2. If not, the user uses an external circuit as negative threshold with our internal OPA or GPAMP. Is it OK?

    It is OK.

    That is, is it possible to have several GPIO as the interrupt triggering source and the inside the ISR, the user can determine which GPIO to trigger this ISR?

    It is OK. SDK gives an example for this usage: (G series example, it should be work for L series)

    4. Can ADC/OPA be used at the same time to save analog pin usage?

    5. Can ADC/GPAMP be used at the same time to save analog pin usage?

    Yes. It can be used in the same pin to ouput analog volatge and do ADC sampling.

    B.R.

    Sal

  • Dear Sal,

    Let me confirm if this is a typo again.

    4. Can ADC/OPA be used at the same time to save analog pin usage?

    5. Can ADC/GPAMP be used at the same time to save analog pin usage?

    Yes. It can be used in the same pin to "input" analog voltage and do ADC sampling.

    It should be "input" analog voltage for OPA/GPAMP and do ADC sampling at the same time.

    Is it correct?

  • Hi Wayne,

    GAMP and OPA module has two input pins and one output pin, they can both enabled with ADC sampling enabled.

    From my perspective, user always want to get the output of OPA/GAMP rather than input of them. Due to OPA and GAMP always worked to amplify the signal, so input signal will be little smaller for ADC to sample. Of course, if customers need to use it, there is no problem.

    B.R.

    Sal