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TMDSCNCD263: Shared Memory section is changing in traget compared to MAP file

Part Number: TMDSCNCD263

Hello Team,

I have an issue with Shared Memory section allocation.

Map file is showing expected address of the memory section.

But when i load the symbols, address of the memory section is changing compared to MAP file.

*When i load program, shared memory section address is correct in HW & similar map file.

Linker script:

EXCTABLE (RX): org = 0x70002000, len = 0x00000100
RESET (RX): org = 0x70002100, len = 0x00000F00
FLASH (RWX): org = 0x70003000, len = 0x00035000
RAM (RWX): org = 0x70038000, len = 0x00018000
FLASH_APP (RWX): org = 0x70050000, len = 0x00050000
RAM_APP (RWX): org = 0x700A1000, len = 0x0000F000
RAM_SHARED (RWX): org = 0x700B0000, len = 0x00000400

.prog_sig :
{
/* ------------------------------------ prog_sig sections ------------------------------------ */
__SHRD_RAM_START = .;
*(.prog_sig)
__SHRD_RAM_END = .;
} > RAM_SHARED

MAP file:

Source Code:

#define PROG_REPROG_FLAG_START_SEC_VAR_NO_INIT_8
#include <MemMap.h>
#pragma clang section bss=".prog_sig"
tNoIntShareVar stNoIntShareVar;
#define PROG_REPROG_FLAG_STOP_SEC_VAR_NO_INIT_8
#include <MemMap.h>

Hardware:

Q) Which of the following is correct for TI Clang compiler section creation?

1)#pragma clang section bss=".prog_sig"
tNoIntShareVar stNoIntShareVar;

2)
tNoIntShareVar stNoIntShareVar __attribute__((section(".prog_sig"))); 

 

project is blocking from past few days because of above issue.

Could you please provide me any inputs.

Kind regards,

Hari