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RM57L843: INTERRUPT PRIORITY - RM57L843

Part Number: RM57L843

HI TI Team,

I am looking to work on projects based on mutliple interrupts like SPI,UART,I2C,ADC,ETHERNET,EDGE,GPIO Interrupts . If at a same times multiple interrupts was occured means which interrupt will executes first. I need to give the interrupts with priority based. 

Kindly guide us. If possible send the example project.

Thanks and Regards,

A. Ajith Kumar

  • Hi Ajith Kumar,

    A lowered number channel will always have higher priority than the higher number channel. And every channel has a CHANMAP bits to configure the interrupt request for the corresponding channel.

    And this is the default channel assignments:

    This means, after ESM interrupt RTI compare 0 have the highest priority and after that RTI compare 1 and so on.

    For example, i want to make the RTI compare 1 as higher priority than RTI compare 0 then i should do as below:

    The default configuration is below right:

    RTI Compare 0 => CHANMAP2 = 2

    RTI Compare 1 => CHANMAP3 = 3

    So, to make RTI compare 1 as higher priority than RTI compare 0 then i should change the mapping as below:

    RTI Compare 0 => CHANMAP2 = 3

    RTI Compare 1 => CHANMAP3 = 2

    Now RTI compare 1 will have higher priority than RTI compare 0 because RTI compare 1 have lower channel number than RTI compare 0. In this way you can change the priority order as required.

    --
    Thanks & regards,
    Jagadish.