MSPM0L1105: ULP application

HS FAE Germany

Part Number: MSPM0L1105

Hi,
customer has may IDD=100uA and has to measure a slow signal (20sps). He want to reduce current for CPU and ADC. In the datasheet the IDDRUN is 0.52mA at 4MHz (SYSOSC). How much would it be with 1MHz or 500kHz?
What about the ADC. In the d/s it is stated 300uA at 200ksps. Can I run it with 1ksps? What is the consumption then?

He knows that he has to use a cap to store the energy and switch between different standby/stop/run mode. But less average current means lower cap.

Regards, Holger

over 1 year ago

0 Eason Zhou over 1 year ago

TI__Mastermind 39775 points

I think it can use a timer(20Hz) to trigger CPU wake from standby mode and control ADC to do the sampling. It can meet customer's requirement.

0 HS FAE Germany over 1 year ago in reply to Eason Zhou

TI__Mastermind 32250 points

do we have similar ref designs or test reports?

0 Janz Bai over 1 year ago in reply to HS FAE Germany

TI__Genius 10580 points

Hello

1). About the approximate IDDRUN at 1 MHz or 500 kHz, you can calculate using this table.

2). You can run ADC with 1k sps. And if you want to measure a slow signal with 20 sps, you can refer to Eason's answer. No matter what sps is, you can use Timer to trigger ADC to do sampling with the sps you want.

3). About the "Timer trigger ADC", we have example code in our SDK. You can refer to the "adc12_triggered_by_timer_event"

Best Regards,

Janz Bai

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MSPM0L1105: ULP application