Other Parts Discussed in Thread: TMDS243EVM, DP83869HM, DP83869
Hi Team,
We've developed a custom board based on the TMDS243EVM but with two RGMII-to-1000Base-X. The board is equipped with the DP83869HM configured for 1000BASE-X over bootstraps:
- RGMII to 1000Base-X
- Fiber Auto-negotiation ON
We're using the Enet Lwip CPSW example with a static IP.
Here's the observed behavior:
-
When the power is turned on, programmed with sbl_null and the counterpart connected, we see LED0 = ON and LED1,2 blinking, which according to the datasheet indicates:
- Fiber Link-up: Stable ON
- RX Activity
We've modified the test_enet EnetApp_initLinkArgs as follows:
linkCfg->speed = ENET_SPEED_1GBIT;
linkCfg->duplexity = ENET_DUPLEX_FULL;
-
When flashing the Enet Lwip CPSW example (DEBUG mode), LED0 goes OFF and ON, and no ping is possible.
-
In the next step, we expanded the ENET_CFG_TRACE_LEVEL to ENET_CFG_TRACE_LEVEL_DEBUG. With this setting, LED0 goes ON and a ping becomes possible, suggesting the driver uses the debug time to set up the link.
Questions:
- Are the configuration settings
linkCfg->speed = ENET_SPEED_1GBIT;
andlinkCfg->duplexity = ENET_DUPLEX_FULL;
correct for RGMII to 1000Base-X, or are we missing something? -
Can it be a case from the application note DP83869 1000Base-X Link Detection (SNLA305)? Is there a driver to support it? What is the best place in the Enet Lwip CPSW example to implement the SNLA305 and which function can be used to implement the waits?
Serial prompts without debug information (ENET_CFG_TRACE_LEVEL_INFO or RELEASE):
==========================
ENET LWIP App
==========================
Enabling clocks!
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 2
Mdio_open: MDIO Manual_Mode enabled
EnetPhy_bindDriver: PHY 3: OUI:080028 Model:0f Ver:03 <-> 'dp83869' : OK
EnetPhy_bindDriver: PHY 15: OUI:080028 Model:0f Ver:03 <-> 'dp83869' : OK
PHY 3 is alive
PHY 15 is alive
[0]: Starting lwIP, local interface IP is 192.168.3.50
[LWIPIF_LWIP] NETIF INIT SUCCESS
Host MAC address-0 : 1c:63:49:14:c8:e2
Host MAC address-0 : 70:ff:76:1e:67:9f
[1]: Starting lwIP, local interface IP is 192.168.4.50
[LWIPIF_LWIP] NETIF INIT SUCCESS
[LWIPIF_LWIP] Enet has been started successfully
[0]status_callback==UP, local interface IP is 192.168.3.50
[1]status_callback==UP, local interface IP is 192.168.4.50
UDP server listening on port 5001
Cpsw_handleLinkUp: Port 2: Link up: 1-Gbps Full-Duplex
MAC Port 2: link up
Cpsw_handleLinkDown: Port 2: Link down
MAC Port 2: link down
Cpsw_handleLinkUp: Port 2: Link up: 1-Gbps Full-Duplex
MAC Port 2: link up
Cpsw_handleLinkDown: Port 2: Link down
MAC Port 2: link down
Serial prompts with debug information (ENET_CFG_TRACE_LEVEL_DEBUG):
==========================
ENET LWIP App
==========================
Enabling clocks!
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 2
Enet_open: cpsw3g: features: 0x0000000e
Enet_open: cpsw3g: errata : 0x00000000
Mdio_open: MDIO Manual_Mode enabled
CpswEst_setState: MAC 1: Set EST state: RESET
CpswEst_clearEstBuf: MAC 1: Clearing both EST buffers
EnetPhy_setNextState: PHY 3: INIT -> FINDING (20 ticks)
EnetPhy_setNextState: PHY 3: FINDING -> FOUND (0 ticks)
EnetPhy_bindDriver: PHY 3: OUI:080028 Model:0f Ver:03 <-> 'dp83867'
EnetPhy_bindDriver: PHY 3: OUI:080028 Model:0f Ver:03 <-> 'dp83869'
EnetPhy_bindDriver: PHY 3: OUI:080028 Model:0f Ver:03 <-> 'dp83869' : OK
EnetPhy_open: PHY 3: open
EnetPhy_showLinkPartnerCompat: PHY 3: recommended link partner config: manual mode at 1 Gbps full-duplex
CpswEst_setState: MAC 2: Set EST state: RESET
CpswEst_clearEstBuf: MAC 2: Clearing both EST buffers
EnetPhy_setNextState: PHY 15: INIT -> FINDING (20 ticks)
EnetPhy_setNextState: PHY 15: FINDING -> FOUND (0 ticks)
EnetPhy_bindDriver: PHY 15: OUI:080028 Model:0f Ver:03 <-> 'dp83867'
EnetPhy_bindDriver: PHY 15: OUI:080028 Model:0f Ver:03 <-> 'dp83869'
EnetPhy_bindDriver: PHY 15: OUI:080028 Model:0f Ver:03 <-> 'dp83869' : OK
EnetPhy_open: PHY 15: open
EnetPhy_showLinkPartnerCompat: PHY 15: recommended link partner config: manual mode at 1 Gbps full-duplex
PHY 3 is alive
PHY 15 is alive
[0]: Starting lwIP, local interface IP is 192.168.3.50
[LWIPIF_LWIP] NETIF INIT SUCCESS
Host MAC address-0 : 1c:63:49:14:c8:e2
Host MAC address-0 : 70:ff:76:1e:67:9f
[1]: Starting lwIP, local interface IP is 192.168.4.50
[LWIPIF_LWIP] NETIF INIT SUCCESS
[LWIPIF_LWIP] Enet has been started successfully
[0]status_callback==UP, local interface IP is 192.168.3.50
[1]status_callback==UP, local interface IP is 192.168.4.50
UDP server listening on port 5001
Dp83869_reset: PHY 3: global soft-reset
EnetPhy_setNextState: PHY 3: FOUND -> RESET_WAIT (10 ticks)
Dp83869_isResetComplete: PHY 3: global soft-reset is complete
EnetPhy_setNextState: PHY 3: RESET_WAIT -> ENABLE (0 ticks)
EnetPhy_enableState: PHY 3: enable
Dp83869_setVtmIdleThresh: PHY 3: Viterbi detector idle count thresh: 4
Dp83869_setDspFFE: PHY 3: DSP FFE Equalizer: 641
Dp83869_setLoopbackCfg: PHY 3: disable loopback
Dp83869_restart: PHY 3: soft-restart
Dp83869_enableAutoMdix: PHY 3: enable automatic cross-over
Dp83869_enableAutoMdix: PHY 3: enable Robust Auto-MDIX
Dp83869_setMiiMode: PHY 3: MII mode: 3
Dp83869_setClkShift: PHY 3: clock shift TX:enable RX:enable
Dp83869_setClkDelay: PHY 3: set delay 250 ps TX, 2000 ps RX
Dp83869_setTxFifoDepth: PHY 3: set FIFO depth 4
Dp83869_setOutputImpedance: PHY 3: set output impedance to 35000 milli-ohms
Dp83869_setGpioMux: PHY 3: set gpio0 = mode6, gpio1 = mode0
Dp83869_setLedMode: PHY 3: set LED0 = mode0, LED1 = mode6, LED2 = mode1, LED3 = mode5
EnetPhy_enableState: PHY 3: req caps: FD1000
EnetPhy_enableState: PHY 3: PHY caps: FD1000 HD1000 FD100 HD100
EnetPhy_enableState: PHY 3: MAC caps: FD1000 FD100 HD100 FD10 HD10
EnetPhy_enableState: PHY 3: refined caps: FD1000
EnetPhy_enableState: PHY 3: PHY is NWAY-capable
EnetPhy_enableState: PHY 3: manual setup
EnetPhy_setupManual: PHY 3: disable NWAY
EnetPhy_setupManual: PHY 3: requested mode: 1 Gbps full-duplex
EnetPhy_setNextState: PHY 3: ENABLE -> LINK_WAIT (50 ticks)
EnetPhy_setNextState: PHY 3: LINK_WAIT -> LINKED (0 ticks)
Cpsw_handleLinkUp: Port 1: Link up: 1-Gbps Full-Duplex
MAC Port 1: link up
[0] link_callback==UP
[1] link_callback==UP
I would appreciate your help in troubleshooting this issue. Thanks in advance for your support.