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TM4C1290NCZAD: Does TM4C have a hardware controller to maintain the SPI clock signal?

xi.yan.kiana
Intellectual 490 points

Part Number: TM4C1290NCZAD

Hi teams:

     Now I am doing SPI communication between two chips. TM4C is used as the host and MSP430 is used as the slave.

When TM4C sends a frame query command, the software code will continue to send a certain byte of dummy signal to provide the clock to the slave.

when the slave is ready with data, since the clock signal always exists, the slave can send data normally, and the host can receive response data normally.

I currently use software to maintain the clock signal. I feel that this method is not very reliable.

I have learned that a better way to maintain the clock signal is to have the support of a hardware controller. When the slave machine processes data, the host hardware generates it by itself. The clock signal maintains communication.

I would like to ask if our TM4C1290NCZAD chip has this hardware controller function. If so, how should I configure it? Is there any reference material?

I'm looking forward to your reply

  • 0
    TI__Guru**** 191886 points

    Hi,

      Are you configuring the on-chip QSSI module? The SSI module works a legacy SPI module. You seem to suggest that you are currently using a bit-bang method to generate the SPI clock. Please refer to the QSSI module on the datasheet. There are also QSSI module examples in TIVAWARE SDK that you can reference. As a SPI master, it will generate SPI clock as long as your software sends data to the SPI shift register.