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I am trying to understand the CPTS module and timestamp capability for ethernet packets. (gPTP/IEEE1588/802.1AS)
Reference: 10.1.3.7 Timestamp Sync Output
Register: CPTS_CONTROL_REG
Field: TS_SYNC_EN
I understand the CPTS module has an output called TS_SYNC.
Do I understand correctly, that as the counter increases, eventually it will flip a higher bit from 0->1 as it increments.
When that "higher bit" is flipped, the TS_SYNC outputs a signal, which can be set to a particular output pin via SYSCONFIG when programming.
The smallest setting is bit 17.
So for example...if BIT #17 was selected in TS_SYNC_EN, then once that bit toggled (as shown below), then there would be an output on TS_SYNC pin?
Before | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
After | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
How long is the TS_SYNC pulse? Does it stay "HIGH" until the bit toggles to "0"?
Nevermind. The description was vague but I think I get it. The TS_SYNC output is just a mirrored output of whatever bit was selected, right?
So if BIT #17 was selected for TS_SYNC output, then that bits state (either 1 or 0) would be output to the TS_SYNC pin.