Hello,
how does the internal SRAM behave in case of a warm reset? we are currently trying to have some volatile data in a region of the SRAM nearly at the end (so not affected by the bootloader), which holds some values and should them hold too after a warm reset.
We use a section in the linker-script for this which is marked with NOLOAD. Also the MPU is configured for this section with non-cached. We compile and link with the tiarmclang LTS3.2.0.
Via CCS this wasn't a problem. If we reload the application via CCS-load the memory holds the values from before. Only a warm reset seems to erase them. I tried figuring something out with the TRM but found no further information to this topic.
Is there a way to still hold the data in the internal SRAM after a warm reset?
Our specific use case is storing information about the reset quickly in the internal RAM so it's possible to read it again after a reset. E.g. if the watchdog triggered, this information shall be stored and then after a reset you should be able to read out what caused the reset. We implemented this also for aborts and so on. Writing to a non-volatile-memory in this case is not sufficient, since we are already in an error-case which should take as less time and resources as possible.
Best regards
Felix
