TM4C1294NCPDT: TM4C129x - Silicon Errata PWM #5

Hello Charles,

Charles Tsai said:

This errata only happens if you are dynamically changing the compare value (for the duty cycle) while the PWM counter is counting.

We are updating the compare value dynamically to control a load. During this, the PWM output is not disabled and the counter is counting to generate the output.
The load value in our application is a constant value, therefore we use a fixed PWM period/frequency.

Will the errata have an impact?

Hi,

  This errata applies when multiple PWM modules are globally synchronized together. Are you using multiple PWM modules? Are you syncing them together? if yes to both of them then the errata applies to you and please follow the workaround. If not, this errata does not impact you. 

Additional synchronization can occur between multiple PWM generators by updating register contents
in one of the following three ways:

■ Immediately. The write value has immediate effect, and the hardware reacts immediately.

■ Locally Synchronized. The write value does not affect the logic until the counter reaches the
value zero at the end of the PWM cycle. In this case, the effect of the write is deferred, providing
a guaranteed defined behavior and preventing overly short or overly long output PWM pulses.

■ Globally Synchronized. The write value does not affect the logic until two sequential events
have occurred: (1) the Update mode for the generator function is programmed for global
synchronization in the PWMnCTL register, and (2) the counter reaches zero at the end of the
PWM cycle. In this case, the effect of the write is deferred until the end of the PWM cycle following
the end of all updates. This mode allows multiple items in multiple PWM generators to be updated
simultaneously without odd effects during the update; everything runs from the old values until
a point at which they all run from the new values. The Update mode of the load and comparator
match values can be individually configured in each PWM generator block. It typically makes
sense to use the synchronous update mechanism across PWM generator blocks when the timers
in those blocks are synchronized, although this is not required in order for this mechanism to
function properly.

Hello Charles,

thank you very much for your detailed answer.
I have received detailed information about the usage of the PWM generation from our software engineer.

Can you please take a look at our actual use case?

The following conditions apply to our project:

1. Load Value for PWM is set only once during the initialization phase. It will never be modified after initialization (constant PWM period).
2. Comparator A and B values often change during runtime (to set different duty cycles).
3. We are using global synchronization mode (to synchronize changes to comparator A and B).

Do you know if errata PWM#05 has an impact on our project under the above conditions?

G.G. said:

1. We are using global synchronization mode (to synchronize changes to comparator A and B).

I don't think your software engineer fully explained the setup. There is no synchronization needed between comparator A and B if they are for the same PWM generator. In another word, each PWM generator has both the comparator A and B and based on the same time-base because there is only one counter. When the counter counts down, an action can be taken when the counter is equal to either comparator A or B. Global synchronization is used only if you are using multiple PWM generators. For example, if you want to synchronize between PWM Generator 0 and Generator 3 and you want the comparator A for Generator 0 to take effect in sync with the comparator B for Generator 3 in which the update of the new compare values do not take effect until both PWM Generator 0 and Generator 3 finish their period.

If we apply changes to comparator values A and B, we need to make sure that both values take effect in the same PWM cycle. Therefore, we use Global Sync. If we would use Local Sync, we run into the risk that we set comparator A immediately before the start of a new PWM cycle and comparator B value immediately after start of that cycle. Thus, the values for A and B would not be set in the desired relation for one PWM cycle.

Please let us know if the Errata applies to our project under the three conditions described earlier.

Hi,

  Please read the Local Sync description again. Using Local Sync, the update to both CMPA and CMPB will not take effect until the PWM cycle is over, not until one CMP is over. 

■ Locally Synchronized. The write value does not affect the logic until the counter reaches the
value zero at the end of the PWM cycle. In this case, the effect of the write is deferred, providing
a guaranteed defined behavior and preventing overly short or overly long output PWM pulses.

Please note that we need to change TWO values (comparator A and comparator B) that need to have a certain relation to each other in EVERY PWM cycle. It is not possible to write new values in comparator A and B registers at the same time. Let's assume we write a new value to comparator A and immediately after that we write a new value to comparator B. In most cases, there will be no problem, but occasionally the PWM counter will reach the value zero just AFTER we change comparator A and BEFORE we change comparator B. If that happens, we have a flawed PWM output for one PWM cycle.

Please just assume that we need global sync. So, the following conditions apply to our project:

1. Load Value for PWM is set only once during the initialization phase. It will never be modified after initialization (constant PWM period).
2. Comparator A and B values often change during runtime (to set different duty cycles).
3. We are using global synchronization mode (to synchronize changes to comparators A and B).

Please just tell us if errata PWM#05 has an impact on our project under the above conditions.

Hi,

  In that case, please apply the workaround suggested. 

 Also a heads up, I'm currently OOO with limited access to Internet until next Tuesday. Please expect delay in my response.