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AM2431: Enent enable No RTOS and enable external Phy Management, build project will fail

Larry Chen
Prodigy 220 points
Part Number: AM2431
Other Parts Discussed in Thread: LP-AM243,

Hi all TI experts,

I've discovered that enabling "External Phy Management" and setting the RTOS Variant to "No RTOS" in Enet (CPSW) leads to compilation failure. The error occurs in the file ti_enet_open_close.c. Are these two settings incompatible when activated simultaneously?

Additionally, I've modified the program based on enet_l2_cpsw, but I find the response speed insufficient—it can't react quickly enough. I've also tried using a timer to trigger rxSemObj, but it's still not fast enough. Are there other methods to accelerate the response time?

Best,

Larry

  • 0
    TI__Expert 7385 points

    Hi Larry,

    I will have to look into the compilation failure, will get back to you on that.

    Regarding the response speed:

    1. What configuration are you testing? What speed are you seeing with that configuration?

    2. Are you building your project in Debug or Release mode?

    3. What is the target response time you are trying to achieve?

    Regards,

    Nitika

  • 0 in reply to Nitika Verma
    Prodigy 220 points

    Hi Nitika,

    Thank you for your reply. I just tested and found that the issue seems to be elsewhere. Testing enet_l2_cpsw on the LP-AM243, I found that the LP board can indeed respond with the packets I expected. However, on my custom board, I can't observe the same status. The difference between the LP board and mine is that I have enabled external Phy management and communicate with another switch IC through RGMII for Ethernet. Could enabling external Phy management be causing a performance difference?

    Best,

    Larry

  • +1 in reply to Larry Chen
    TI__Expert 7385 points

    Hi Larry,

    When you say "the LP board can indeed respond with the packets I expected" - can you help me understand what you mean by that? What parameters are you considering here and what is your expectation?

    As for your first question, 

    Larry Chen said:
    I've discovered that enabling "External Phy Management" and setting the RTOS Variant to "No RTOS" in Enet (CPSW) leads to compilation failure. The error occurs in the file ti_enet_open_close.c. Are these two settings incompatible when activated simultaneously?

    This seems to be a bug, I have reported the same internally, we will be working on fixing this.

    Regards,

    Nitika

  • 0 in reply to Nitika Verma
    Prodigy 220 points

    Hi Nitika,

    Sorry for the lack of precision in my description. Let me explain in detail. I am currently using the AM2431 to develop our product. One of our main features is to communicate via Ethernet. Therefore, I have set the CPSW on the AM2431 to 1-Gbps and connected it to another switch IC via RGMII, using its Phy as the external communication interface. I prefer not to have the AM2431 handle packet forwarding. Our product's usage mode involves chaining multiple devices together, controlled by a single controller that sends raw Ethernet packets for control.

    Now, I've discovered that when my controller sends raw packets to the AM2431, it can correctly receive and process each packet. Approximately every 60 ms, a specific packet requires a response to be sent back to the controller. Through debug mode, I can see that the AM2431 receives this specific packet and sends the necessary response back to the controller. However, on the controller side, I can't see the packet returned from the AM2431 in Wireshark. It often takes several sends of the specific packet before I can see a packet returned from the AM2431. Sometimes, I can see that the AM2431 correctly returns packets consecutively. It appears that the issue is random.

    When I try using the LP-AM243 to test the "enet_l2_cpsw" example program connected to my controller, I can see that the LP-AM243 responds to every special packet without any delay and without missing any.

    I currently suspect that some functions of the AM243 may conflict with the switch IC, causing this phenomenon, or perhaps some settings have not been properly configured. Do you have any suggested directions I could try? I have thought about enabling the ALE bypass mode, but after enabling it, I can't receive any packets at all.

    Best,

    Larry

  • 0 in reply to Larry Chen
    Prodigy 220 points

    Hi Nitika,

    I've found the real problem—it was due to my incorrect configuration of the switch IC. Thank you for your help!!

    Best,

    Larry