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TM4C1294KCPDT: TM4C1294

George Huang
Prodigy 250 points
Part Number: TM4C1294KCPDT

Hello,

We are using the TM4C1294 EPI interface in General Purpose Mode to interface with FPGA. In the datasheet section 11.4.4, it mentions "The configuration allows for choice of an output clock (free-running or gated), a framing signal (with frame size), a ready input (to stretch transactions), an address (of varying sizes), and data (of varying sizes)." Based on this statement it looks that the General Purpose Mode can support Ready input . However I cannot find this Ready description in either "Table 11-12. EPI General-Purpose Signal Connections" or timing picture. Can you please confirm if this Ready is supported in EPI General-Purpose Signal mode or not. If supported, could you please provide the mapped pin and timing?

Thanks,

George

  • 0
    TI__Guru**** 191486 points

    Hi George,

    George Huang said:
    In the datasheet section 11.4.4, it mentions "The configuration allows for choice of an output clock (free-running or gated), a framing signal (with frame size), a ready input (to stretch transactions), an address (of varying sizes), and data (of varying sizes)

      I'm also confused with the statement about the ready input. I do not see such input mapping in the GP table. Please assume there is no ready input. 

  • 0
    Prodigy 250 points

    Thank you Charles for the feedback.

    Further question about the EPI General Purpose Mode:  We have 8 bit data/12 bit address to access FPGA resources. The FPGA resources are 32 bits registers/rams. How can we use 8bit EPI interface access 32bits resources efficiently? Specifically, in the EPI General Purpose Mode,  is that possible for TIVA to automatically generate 4 consecutive byte addresses as in "Figure 11-21. Read Accesses", to access a 32-bit register in FPGA? both read or write?

    If not, in order to access 32bit register in FPGA, should we use 4 separated byte accesses?

    Thanks,

    George

  • 0 in reply to George Huang
    TI__Guru**** 191486 points
    George Huang said:
    We have 8 bit data/12 bit address to access FPGA resources

    Hi George,

      You will need to use the pinmapping in the 2nd column of Table 11-12.

    George Huang said:
    The FPGA resources are 32 bits registers/rams. How can we use 8bit EPI interface access 32bits resources efficiently?

    You will need to use the DSIZE to specify 8-bit accesses.

    ■ Data may be 8 bits, 16 bits, 24 bits, or 32 bits (controlled by the DSIZE field in the EPIGPCFG
    register). By default, the EPI controller uses data bits [7:0] when the DSIZE field in the EPIGPCFG
    register is 0x0; data bits [15:0] when the DSIZE field is 0x1; data bits [23:0] when the DSIZE
    field is 0x2; and data bits [31:0] when the DSIZE field is 0x3.32-bit data cannot be used with
    address or EPI clock or any other signal. 24-bit data can only be used with 4-bit address or no
    address.

    George Huang said:

    If not, in order to access 32bit register in FPGA, should we use 4 separated byte accesses?

    Yes, you would need to produce 4 byte addresses in order to read a 32-bit register.

  • 0 in reply to Charles Tsai
    Prodigy 250 points

    Thanks Charles. I have one more question.

    Is it goof idea to use datasheet "Figure 27-27. PSRAM Single Burst Write" and "Figure 27-26. PSRAM Single Burst Read" to read/write 

    PGA 32 bit registers? Looks the configuration sequence on page 815 to initializing the PSRAM is pretty complicated. Is that possible for SW to do that sequence once, and then initiate read FPGA register or write FPGA register in simpler step, to get timing in "Figure 27-27. PSRAM Single Burst Write" and "Figure 27-26. PSRAM Single Burst Read"?

    Can you by any chance provide piece of code to do the similar initialization as above? Or point out which steps in page 815 sequence need to be adjusted to get  iming in "Figure 27-27. PSRAM Single Burst Write" and "Figure 27-26. PSRAM Single Burst Read"?

    Thank you.

  • 0 in reply to George Huang
    TI__Guru**** 191486 points

    Hi George,

     I'm sorry. I'm on vacation until next Tuesday with limited access to Internet. I will respond to your question when I come back next Wednesday.