I have an interrupt that accesses shared / non-cached MSRAM (R5F). At the start of the interrupt, it takes around 12900 cycles, but later on, the same function for a larger chunk of memory to the same region takes 4000 cycles. This is a compiler generated call to copy a structure. If I manually copy each member, the compiler uses load/store instructions instead and the copy time is 2600 cycles.This implies that it was in MSRAM and needed to be moved from cache first.
The interrupt is being directed to be placed into TCM. Shouldn't the compiler put all the function instructions into TCM?
If this is because the function was in MSRAM and out of cache, how does one move it into TCM?
(side question): Why is the compiler using memcpy8 on a structure I've aligned to > 32 bits?
