While debugging my application of 4 processors with IPC, I occasionally have problems with IpcNotify functions and Spinlocks.
The evidence points to the state of Mailbox and Spinlocks not being reset on warm reset by the initialization functions. This makes sense to me as the right way to do it.
However, it makes CCS debugging a more difficult. Is there a way CCS can reset the system IPC when it resets the processors?
Hello Traveler,
Sorry for the delayed reply. I was on training and other occasions.
1. Are the spinlocks and mailbox for IPC reset by CCS during a Run->Debug? (I expect no.)
No, as I mentioned in the above, if you click the CPU reset, the IPC memory holds the previous values. If you do Warm Reset your SOC will start executing from RBL → SBL → Application. In this case, you need to load your application from CCS.
My typical software test cycle is to improve the source code and then Run->Debug without power cycle. Power cycles are difficult in my hardware implementation so I would like to understand if the mailbox hardware can be reset by CCS during a debug cycle? If so, how? targetConfig setting?
No, CCS can't reset the Mailbox hardware . You need to do Warm Reset the device and next load the same example .So, that your IPC memory can be reset other than this method ,we can't do anything .Warm Reset can be already done from CCS gel scripts .Please look at the below image .
System Reset - > Warm Reset .
Actually by controlling below Register from 0 to 3 bits also you can do the entire dvice Reset .So, that your IPC memory address also can be cleared .
Regards,
Anil.
