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AM263P4: Availability and pin-compatibility w.r.t. AM263x

Part Number: AM263P4

Hello,

Some friends and I are evaluating the use of AM263x for an application and we noticed the preproduction AM263P4, which would be much more advantageous because we feel 2MB SRAM might be insufficient for our application while 3MB would be much less riskier.

- Is there any planned release date for the AM263P4?

- Will it and the AM263x be pin compatible?

- Will it be released already with the AEC-Q100 qualification?

- What would be the recommended way to connect an external RAM to it (or the base AM263x)? Would it be the GPMC?

- What is the data width of the GPMC? According to the datasheet (and to its pin description?) it is up to 16 bits but the reference manual states "8-, 16- or 32-bit-wide data path to external memory device"

Thanks,

Ricardo

  • Hello Ricardo,

    - Is there any planned release date for the AM263P4?

    Can't give any specific dates on this, but expect it to be this quarter.

    - Will it be released already with the AEC-Q100 qualification?

    Yes.

    - What would be the recommended way to connect an external RAM to it (or the base AM263x)? Would it be the GPMC?

    For AM263 yes GPMC would be the recommended method. However, AM263P4 does not have the GPMC peripheral.

    - What is the data width of the GPMC? According to the datasheet (and to its pin description?) it is up to 16 bits but the reference manual states "8-, 16- or 32-bit-wide data path to external memory device"

    It depends on the mode used. The datasheet describes the available address and data pins based on non-multiplexed mode but in multiplexed mode the bus can be extended to 32-bit wide. The datasheet descriptions matches with the typical use case while the multiplexed mode is a special mode to extend the bus size so it would be misleading to cite a 32-bit wide bus in the datasheet given how the multiplexed mode works.

    Best Regards,

    Ralph Jacobi

  • Hi Ralph,

    Considering that we would need to connect the MCU to an external Flash, an external RAM and an ASIC/FPGA, what would be the recommended way of using the AM263P4?

    Thanks,

    Ricardo

  • Hello Ricardo,

    The PRU interface is one potential option but we don't have any examples to demonstrate that. A non-recommended but potentially viable path is using the CS on OSPI to interface a second device on OSPI but supporting high speed OSPI flash with that configuration would introduce layout challenges and there is not a proof-of-concept to verify that is possible.

    In general for AM263P options are limited for that. Is there a requirement for Resolver-to-Digital Converter with memory expansion? If not, you are likely better of using AM263.

    Best Regards,

    Ralph Jacobi

  • Hello Ralph,

    Actually, we had taken the AM263P as "an AM263 with extra internal SRAM", which was our main worry about the AM263... we did not notice it had no GPMC, which is very important for us to ensure efficient communication with an external SRAM and an FPGA.

    Incidentally, we noticed erratum i2313 (when looking at the 263-263P migration guide) and we would like to understand it better: are we able to perform 32-bit reads using the 16-bit GPMC in the 263x? Do we have to use A/D multiplexing?

    Thanks,

    Ricardo

  • Hi Ricardo,

    Can you please provide us the part number of the memory you are trying to interface with?

    Regards,
    Rijohn

  • Hi Rijohn,

    One of the FPGAs we are looking at is the Intel Cyclone V 5CGXC7. The external RAM might be a CY7C1041G.

    Thanks,

    Ricardo

  • Hi Ricardo,

    Thank you for your patience.
    This external RAM mentioned above can be interfaced with the GPMC in AM263x.

    We are working on the errata part of the question. But the expert on this is currently out of office. We will look at this and get back in a week for the detailed description of errata.

    Regards,
    Rijohn