Other Parts Discussed in Thread: SYSCONFIG
Dear Ti Expert
Based on AM243x Motor Control SDK 09.01.00
For BiSS-C module , Sysconfig 1.18. fixed the core clock to 200Mhz. Due to combination of internal IP, we need to use 300Mhz core clock.
Question
1) Is that any hardware restriction that will prevent us from using 300Mhz on BiSS-C IP
2) Would you be able to give pointers on modification required
Note:
Based on our experience, setting the core clock to 300Mhz to current BiSS IP is causing issues during biss-C read position.
As example, We are reading 26Bit encoder , thus total bits are 26+2 (EW)+6(CRC)
The BiCC-C is able to read 1st 16-20 bit correctly , then the remaining bits wrong
Thank you
Alan I
