I am implementing a manufacturing test application.
If possible, I would like to read and report any status available concerning the crystal (XTALCLK_OSC), and the clocks generated by the PLL/Clocking.
For instance, SPRUJ55 Section 6.4 describes a Limp Mode “A dedicate coarse clock loss logic checks the XTAL clock against the RC CLK continuously to detect if the XTAL clock is toggling.”
However, I do not see any information in that section concerning registers that can be read.
SPRUJ55 section 6.4.5 Clocking Registers. Says: “For additional details related to device clocking registers, please refer to the Control - RCM Registers section.”
However, I do not see any information in that section that is related.
Please advise.