i2313 GPMC: Sub-32-bit read issue with NAND and FPGA/FIFO
Details: Sub-32-bit reads on the GPMC interface will miss portions of the data, which will result
in incorrect read data. This includes 8-bit or 16-bit reads from a NAND device or from
an FPGA or FIFO interface. Note that 3-byte accesses are not allowed on the GPMC
interface.
Workaround(s):
Read accesses on the GPMC interface must be performed as 32-bit reads. Writes are not
affected by this erratum.
Does this mean that I cannot use the GPMC in synchronous or asynchronous (Non-Multiplexed) mode(16bit data) ??
Is there a more detailed description of this issue?
Thanks
Dennis
