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AM2432: EIP connection failure and dp83822 auto-nego issue

Part Number: AM2432

Hi BU experts,

My customer is developing Ethernet/IP application using am243x and dp83822. The EIP works well normally, however, when they toggle the power quickly as a stress test, the EIP connection fails.

They can't any response from the their board to the EIP host.

Below is a few more observation, when the device is abnormal:

1. Auto-nego becomes 10M, instead of 100M

2. In PRU register, RX good is 0

3 EIP host (PC) is not able to ping the device

4. PHY registers are as below:

abnormal.txt
异常时
MAIN_Cortex_R5_0_0: GEL Output: 
 ICSSG0 PHY0 Registers 
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000000 Val : 0x00003100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000001 Val : 0x0000786D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000002 Val : 0x00002000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000003 Val : 0x0000A240
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000004 Val : 0x000001E1
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000005 Val : 0x0000CC61
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000006 Val : 0x0000000D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000007 Val : 0x00002001
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000008 Val : 0x00005806
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000009 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000A Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000B Val : 0x00001000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000C Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000D Val : 0x0000401F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000E Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000010 Val : 0x00000017
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000011 Val : 0x00000108
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000012 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000013 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000014 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000015 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000016 Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000017 Val : 0x00000049
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000018 Val : 0x00000400
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000019 Val : 0x00008003
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001A Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001B Val : 0x0000007D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001C Val : 0x000005EE
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001D Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001E Val : 0x00000002
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000042 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000467 Val : 0x00003F4F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000468 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: 
 ICSSG0 PHY1 Registers 
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000000 Val : 0x00003100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000001 Val : 0x00007849
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000002 Val : 0x00002000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000003 Val : 0x0000A240
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000004 Val : 0x000001E1
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000005 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000006 Val : 0x00000004
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000007 Val : 0x00002001
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000008 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000009 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000A Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000B Val : 0x00001000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000C Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000D Val : 0x0000401F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000E Val : 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000010 Val : 0x00004002
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000011 Val : 0x00000108
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000012 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000013 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000014 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000015 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000016 Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000017 Val : 0x00000041
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000018 Val : 0x00000400
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000019 Val : 0x0000800F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001A Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001B Val : 0x0000007D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001C Val : 0x000005EE
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001D Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001E Val : 0x00000102
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000042 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000467 Val : 0x0000FF4F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000468 Val : 0x00000003
normal.txt
正常时
MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
MAIN_Cortex_R5_0_0: GEL Output: 
 ICSSG0 PHY0 Registers 
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000000 Val : 0x00003100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000001 Val : 0x0000786D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000002 Val : 0x00002000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000003 Val : 0x0000A240
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000004 Val : 0x000001E1
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000005 Val : 0x0000CDE1
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000006 Val : 0x0000000F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000007 Val : 0x00002001
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000008 Val : 0x00004006
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000009 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000A Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000B Val : 0x00001000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000C Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000D Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000E Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000000F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000010 Val : 0x00000615
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000011 Val : 0x00000108
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000012 Val : 0x00006400
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000013 Val : 0x00002800
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000014 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000015 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000016 Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000017 Val : 0x00000049
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000018 Val : 0x00000400
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000019 Val : 0x00008C03
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001A Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001B Val : 0x0000007D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001C Val : 0x000005EE
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001D Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001E Val : 0x00000102
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x0000001F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000042 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000467 Val : 0x00003F4F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000468 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: 
 ICSSG0 PHY1 Registers 
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000000 Val : 0x00003100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000001 Val : 0x00007849
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000002 Val : 0x00002000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000003 Val : 0x0000A240
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000004 Val : 0x000001E1
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000005 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000006 Val : 0x00000004
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000007 Val : 0x00002001
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000008 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000009 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000A Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000B Val : 0x00001000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000C Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000D Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000E Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000000F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000010 Val : 0x00000002
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000011 Val : 0x00000108
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000012 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000013 Val : 0x00000800
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000014 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000015 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000016 Val : 0x00000100
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000017 Val : 0x00000041
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000018 Val : 0x00000400
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000019 Val : 0x0000800F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001A Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001B Val : 0x0000007D
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001C Val : 0x000005EE
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001D Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001E Val : 0x00000102
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x0000001F Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000042 Val : 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000467 Val : 0x0000FF4F
MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x0000000F Reg : 0x00000468 Val : 0x00000003

5. When the device is abnormal, re-connecting the cable would not restore connection, but another power cycle will do.

Is there any suggestion on how to locate the issue?

Regards,

Hang.

  • Hi Hang,

    Thank you for the detailed analysis of the issue.

    I have redirected your issue to the domain expert, they will get back to you shortly.

    Regards,

    Nitika

  • Hi Hang,

    Thank you for the detailed post. Can you please provide the following information:

    1. SDK version
    2. Network Topology for the test
    3. Configured Speed and Duplexity of the Ethernet Link on PC side 
    4. Expected Speed and Duplexity of the DUT
    5. Actual Speed and Duplexity of the DUT

    Regards
    Archit Dev
  • Hi Archit,

    1. They are using SDK 9.00.00.03

    2. Host(PC) connects DUT

    3 & 4. 100M full duplex.

    5. 10M when abnormal, 100M when normal, both full duplex

    Note that the issue only occurs by chances after power-cycling the DUT repetitively. The DUT works well at 100M full duplex normally.

    As an update, we tried resetting the PHY, but the connection is not restoring.

    Regards,

    Hang.

  • Hi Hang,

    Here are my thoughts looking at the PHY registers:

    4. PHY registers are as below:

    There are two sets of logs, both has DP83822 present at PHY address 3 and F.

    I assume there are no connections on the ICSSG1 on both these logs, so the link is down.

    Comparing register logs of ICSSG0:

    MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000005 Val : 0x0000CC61
    MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000010 Val : 0x00000017

    Reg 5h indicated link partner auto-negotiation capabilities, bit 7 and 8 indicated that link partner does not advertise 100Base-TX full and half duplex. This is the reason in the first log PHY is linked up at 10mbps.

    MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000005 Val : 0x0000CDE1
    MAIN_Cortex_R5_0_0: GEL Output: PhyAddr: 0x00000003 Reg : 0x00000010 Val : 0x00000615

    Reg 5h indicated link partner auto-negotiation capabilities, bit 7 and 8 indicated that link partner advertise 100Base-TX full and half duplex. PHY links up at 100mbps.

     

    What is the link partner DP83822 conencted to? Can you connect two DP83822 PHYs back to back and perform this test?

    Regards,
    Rahul

  • Hi Rahul

    Thans for your in time replies and the info about the link partner! We are now checking the auto-nego partner now. This may take some time since the abnormally happens around every 1000 power-cycle.

    Meanwhile, does the EIP stack on am243x support 10M?

    Regards,

    Hang.

  • Hi Hang,

    In the EthernetIP example from the Industrial Communications SDK v 9.0, the following Speed and Duplex configurations are supported and tested:

    > Speed : 10M and 100M
    > Duplex mode : Auto-negotiation and Full Duplex

    NOTE: Starting from the Industrial Communications SDK v9.2, the Half Duplex mode is also supported.

    For more details, please refer to the EIP Datasheet for SDK version 9.0 here : https://software-dl.ti.com/processor-industrial-sw/esd/ind_comms_sdk/am243x/09_00_00_03/docs/am243x/ethernetip_adapter/eip_datasheet.html 

    Regards
    Archit Dev

  • Hi Archit,

    As an update, we had a meeting with PHY team to try solve the issue from the PHY side. 

    Meanwhile, since the EIP example supports 10M, can it automatically adapt to 10M when the PHY is negotiated as 10M, without additional settings?

    Regards,

    Hang.

  • Hi Hang,

    Yes, the EthernetIP application can automatically adapt to 10M when the PHY is negotiated as 10M, without any additional settings.

    Regards
    Archit Dev