TMS570LC4357: Can communications between processors

I am new at this stuff so please excuse me if this is a dumb question. We have 2 TMS570LC4357 processors mounted on a single board. We now need to establish communications between them and have attempted to directly connect the two CAN3 busses together with the TX on processor 1 connected to the RX on processor and vice-versa (We have lots of stuff going on with the processors that means we have no DMA ,SCI etc resources available for this task). I can run the loopback example given in Halcogen on both processors and it works fine. If I then remove CAN 1, 2 and 4 (we are using CAN3) and remove the loopback then the message is not transmitted to the other processor. I receive an error notification of E5 Looking in the manual this has an explanation of '

Bit0 Error: During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (logical value 0), but the monitored bus level was recessive. During Bus-Off recovery, this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus-Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed).

This doesn't mean much to me as I have no hardware background but it looks like it is saying the signal isn't big enough. I see elsewhere that the TX/RX pins are connected to a transceiver which is then connected to the bus. Are we being overoptimistic that connecting the TX and RX pins of the processors would work. The two processors are about 3 or 4 inches apart on the board.

Thanks for any help you can offer.

Regards

Andy