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LP-MSPM0G3507: How to verify ADC bit error

Part Number: LP-MSPM0G3507

Tool/software:

Hi, I hope to confirm the ADC bit error number of MSPM0G350˙, using VREF and measuring it, but the result seems to be different from what is claimed, even reaching 4-5bit. How can I confirm? Is there a suitable reference code? or is it need different hardware?

  • Hi, fb

    There are a lot of error can cause 4-5bit error condition.

    Vref, Vcc, input signal's noise, etc. 

    You need to optimize the above noise and your test environment, such as hardware connections.

    In a relatively good test environment, more than 10 bits is acceptable.

    Regards,

    Helic

  • Hi Helic

    Thanks! Let me explain something clearly.

    I use EVB LP-MSPM0G3507 as the verification platform and execute the adc12_max_freq_dma example code provided by mspm0_sdk. In the settings,

    VREF is modified to +, - enabled. There are also some changes in the circuit. The first is to connect VREF+ to PB25- Connect, and change R73 to 10K, and

    connect a 10K resistor and 47u capacitor in series. You can refer to the attached picture.


    Is there any problem with such a test? Or is there any recommended testing hardware or software?

    FB

  • Hi, 

    Sorry, surrounding circuits are not my strong point.

    Have you confirmed that the input voltage to the ADC has low noise?

    For ADC Vref, If you don't have high-precision Vref, it is recommended to use the Vcc of MSPM0 and try to reduce the Vcc noise.

    Also, during ADC sampling, do not to using other peripherals such as uart. To minimize the interference of internal digital circuits on ADC accuracy.

    Regards,

    Helic

  • Hi Helic,

    Thank you for your support! If we still need to know the correct configuration, including software settings, hardware production, etc., how should we proceed? Is it necessary to open another question in this forum?

    FB

  • Hi, 

    What's your input signal? How high accuracy do you expect for ADC?

    You can try oversampling to improve the SNR.

    Also, a longer ADC sampling time in software will also help to reduce ADC noise, larger than 1us is OK.

    Is it necessary to open another question in this forum?

    No. That will be me too.

    Regards,

    Helic