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MSPM0L1306: Application issues of chips

Tonyx.wu
Genius 3915 points
Part Number: MSPM0L1306

Tool/software:

1、 DMA can only support one interrupt, how should timeout reception be implemented?

2、I want to transmit 16 mechanism data, and the bus is idle for a period of time to consider the reception complete.  Can this timeout mechanism be configured on the hardware?  How should it be configured specifically?

3、How is the DL_UART_DMA_INTERRUPT_RX_TIMEOUT triggered?

  • 0
    TI__Mastermind 24295 points

    Hi Tony,

    Tonyx.wu said:
    1、 DMA can only support one interrupt, how should timeout reception be implemented?

    It does NOT means the interrupt, it defines the trigger source of the DMA. And it does not generate the interrupt.

    Tonyx.wu said:
    2、I want to transmit 16 mechanism data, and the bus is idle for a period of time to consider the reception complete.  Can this timeout mechanism be configured on the hardware?  How should it be configured specifically?

    You can choose timeout function for this implementation. The details please refer to the TRM:

    Tonyx.wu said:
    3、How is the DL_UART_DMA_INTERRUPT_RX_TIMEOUT triggered?

    I do NOT find the interrupt you described. I guess you mean that how UART_RX_Timeout interrupt trigger the DMA transfer. It does when there is a timeout interrupt asserted and then start the DMA transfer. Please refer to TRM for the Timeout feature.

    B.R.

    Sal