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TMS570LC4357: queiry on RTI Timer register overflow/rollover

Bharath Kumar Konduru
Prodigy 90 points

Part Number: TMS570LC4357

Tool/software:

Hi,
For RTI, we have below implementation to read timer 0 :

 timer_h = static_cast<Uint32>(rti_base[FRC0 ]);
  timer_l = static_cast<Uint32>(rti_base[UC0 ]);


but, for a scenario mentioned below we believe that timer may read incorrect values:

When FRC0 = 0 , URC 0 = 0xFFFFFFFF

 timer_h = static_cast<Uint32>(rti_base[FRC0 ]);

//timer_h would be 0

 timer_l = static_cast<Uint32>(rti_base[UC0]);

//timer_l will be zero as UC0 will increment its timer count after previous instruction (rolls over) i.e., 0xFFFFFFFF +1 => 0 .

and timer_h will be 0 but the expectation is that timer_h should be 1.

 

Is there a solution to handle this scenario ?

  • 0
    TI__Guru 74476 points

    Hi Bharath,

    Please refer the below highlighted lines in the TRM

    FRC0 increment happen only if the UC0 value matches with CPUC0. And if you verify the FRCx formula given below

    If you have nonzero value of CPUCx value then FRCx will be increment after counting the CPUCx+1 RTI clocks, that means the UC0 value should match the CPUCx and then on next clock pulse (i.e. CPUCx+1) the FRCx value will be incremented by 1 and UCx value will be zero.

    In your case i am assuming you are keeping the CPUCx zero, In this case as given in the formula FRCx will be increment after counting the 2^32+1 RTI clocks. So that means UCx will start from zero and it reaches to 0xFFFFFFFF(i.e. 2^32 -1) and on next RTI clock UCx will becomes zero (i.e 2^32) that means now our UCx matched with CPUCx but still FRCx will be zero only because as per formula FRCx will increment only after counting 2^32+1 RTI clocks. So, on next RTI clock, FRCx will be increment by one and UCx counter value will become zero.

    I hope this clarifies the behavior, and now if you want to increment FRCx after UCx reaching to 0xFFFFFFFF, then you should keep the CPUCx register value as 0xFFFFFFFF. If you configure like this then after UCx matches to 0xFFFFFFFF on next RTICLK pulse the UCx will becomes the zero and FRCx will be increment by one.

    --
    Thanks & regards,
    Jagadish.