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AM2634: When 2 SDFMs are configured, the code runs to the exception point

zhou nanyi
Prodigy 135 points
Part Number: AM2634

Tool/software:

environment： CCS12.7 sdk9.0.02   I used my own PCB with 263x

configured SDFM0 in syscfg:  use filter channel 4, IO set SDFM CLK Pin A15 Data Pin C14                       

configured SDFM1 in syscfg:  use filter channel 3/4, IO set SDFM CLK Pin B13&A13 Data Pin B12&A12   

complier and run,  code goes to bellow, I even didn't configure about interrupt

void __attribute__((interrupt("ABORT"), section(".text.hwi"),weak)) HwiP_data_abort_handler_c(void)
{
    volatile uint32_t loop = 1;
    while(loop!=0U)
    {
        ;
    }
}

My code is bellow:

void init_sigmaDelta(void)
{
    /* Over value threshold settings */
    uint16_t hlt = 0x7FFF;
    /* Under value threshold settings */
    uint16_t llt = 0x0000;

    /* Configure Modulator Clock rate = Modulator data rate */
    SDFM_setupModulatorClock(SDFM_VBUS_BASE_ADDR, SDFM_FILTER_4, SDFM_MODULATOR_CLK_EQUAL_DATA_RATE); //VBUS

    SDFM_setupModulatorClock(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_3, SDFM_MODULATOR_CLK_EQUAL_DATA_RATE);
    SDFM_setupModulatorClock(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_4, SDFM_MODULATOR_CLK_EQUAL_DATA_RATE);

    SDFM_enableSynchronizer(SDFM_VBUS_BASE_ADDR, SDFM_FILTER_4, SDFM_CLOCK_SYNCHRONIZER | SDFM_DATA_SYNCHRONIZER);
    SDFM_selectClockSource(SDFM_VBUS_BASE_ADDR, SDFM_FILTER_4, SDFM_CLK_SOURCE_CHANNEL_CLK);
    SDFM_configEnhancedComparator(SDFM_VBUS_BASE_ADDR, (SDFM_FILTER_4 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(32)), SDFM_THRESHOLD(32767,0), \
                                   SDFM_THRESHOLD(32767,0), (SDFM_HTLZ_DISABLE | 32767));
    SDFM_selectCompEventSource(SDFM_VBUS_BASE_ADDR, SDFM_FILTER_4 , SDFM_COMP_EVENT_1 , SDFM_COMP_EVENT_SRC_COMPH1);
    SDFM_selectCompEventSource(SDFM_VBUS_BASE_ADDR, SDFM_FILTER_4 , SDFM_COMP_EVENT_2 , SDFM_COMP_EVENT_SRC_COMPL1);
    SDFM_configDataFilter(SDFM_VBUS_BASE_ADDR, (SDFM_FILTER_4 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(128)), \
                          (SDFM_FILTER_ENABLE | SDFM_DATA_FORMAT_16_BIT | SDFM_SHIFT_VALUE(7)));
    SDFM_enableMainFilter(SDFM_VBUS_BASE_ADDR);
    
    SDFM_enableSynchronizer(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_3, SDFM_CLOCK_SYNCHRONIZER | SDFM_DATA_SYNCHRONIZER);
    SDFM_enableSynchronizer(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_4, SDFM_CLOCK_SYNCHRONIZER | SDFM_DATA_SYNCHRONIZER);
    SDFM_selectClockSource(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_3, SDFM_CLK_SOURCE_CHANNEL_CLK);
    SDFM_selectClockSource(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_4, SDFM_CLK_SOURCE_CHANNEL_CLK);
    SDFM_configEnhancedComparator(SDFM_UW_PHASE_BASE_ADDR, (SDFM_FILTER_3 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(32)), SDFM_THRESHOLD(32767,0), \
                                  SDFM_THRESHOLD(32767,0), (SDFM_HTLZ_DISABLE | 32767));
    SDFM_selectCompEventSource(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_3 , SDFM_COMP_EVENT_1 , SDFM_COMP_EVENT_SRC_COMPH1);
    SDFM_selectCompEventSource(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_3 , SDFM_COMP_EVENT_2 , SDFM_COMP_EVENT_SRC_COMPL1);
    SDFM_configEnhancedComparator(SDFM_UW_PHASE_BASE_ADDR, (SDFM_FILTER_4 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(32)), SDFM_THRESHOLD(32767,0), \
                                  SDFM_THRESHOLD(32767,0), (SDFM_HTLZ_DISABLE | 32767));
    SDFM_selectCompEventSource(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_4 , SDFM_COMP_EVENT_1 , SDFM_COMP_EVENT_SRC_COMPH1);
    SDFM_selectCompEventSource(SDFM_UW_PHASE_BASE_ADDR, SDFM_FILTER_4 , SDFM_COMP_EVENT_2 , SDFM_COMP_EVENT_SRC_COMPL1);
    SDFM_configDataFilter(SDFM_UW_PHASE_BASE_ADDR, (SDFM_FILTER_3 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(128)), \
                          (SDFM_FILTER_ENABLE | SDFM_DATA_FORMAT_16_BIT | SDFM_SHIFT_VALUE(7)));
    SDFM_configDataFilter(SDFM_UW_PHASE_BASE_ADDR, (SDFM_FILTER_4 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(128)), \
                          (SDFM_FILTER_ENABLE | SDFM_DATA_FORMAT_16_BIT | SDFM_SHIFT_VALUE(7)));
    SDFM_enableMainFilter(SDFM_UW_PHASE_BASE_ADDR);
}

and mainloop:

int main(void)
{
    System_init();
    Board_init();

    init_sigmaDelta();
    while(1);

    Board_deinit();
    System_deinit();

    return 0;
}

When I delete sdfm0 or sdfm1, the code runs properly, I tried many times, no matter how the channels are matched, as long as 2 SDFMs are configured at the same time, errors will occur.

When I run code on evaluation board, everything goes fine include 2 SDFMs work together, but on my own board, the 2 SDFMs cannot configure together,  why? I ran  other peripherals like spi/pwm/uart/adc/dac……everything goes fine except 2 SDFMs configure together

  • 0
    Prodigy 135 points

    sorry, The chip is different, my chip use AM2632C, but evaluation board use AM2634B

  • 0
    Prodigy 135 points

    I rewrote the code by manipulating the address and found that the problem occurred in the bellow:

    static uint16_t u16Reg, u16Reg1= 0;
    u16Reg  = HW_RD_REG16(0x50268080);
    u16Reg1 = HW_RD_REG16(0x50269060);

    when I read 0x50268080(CTL4 in SDFM0) everything OK,

    but when I read 0x50269060(CTL3 in SDFM1) the code goes to abnormal.

    Then I used view->Memory Browser, It was found that after code initialization, there was a value before the address 0x50269000, but all subsequent values were “???”

    When I used evaluation board, all the address have its value.

    I think this is the reason for the error, but why is it like this? Does 2632C not support two SDFMs, if not, how do I solve it?

  • 0
    Prodigy 135 points

    My chip is AM2632CNDFHAZCZ, the ninth character is "D", the evaluation board is AM2634COMFHAZCZ，the ninth character is "M". Is this the reason why my chip only has one SDFM?

  • +1 in reply to zhou nanyi
    TI__Mastermind 22953 points

    Hello Zhou,

    Apologies for the delay in response here as many of us were out due to the holidays.

    You are correct, this is a limitation of the specific device you are using which only supports a single SDFM instance. The EVM's (Launchpad and ControlCard) always use the superset device to enable developers to utilize all available peripherals and cut down to lower end options after the system/application has been flushed out.

    Best Regards,

    Zackary