Initialize floating point configuration in TMDX570LS20SUSB controller?

Hi Gowdham,

The Floating Point Unit (FPU) is not enabled  by default and must be enabled using the Cortex-R4F CPU's CP15 register.

• First access to the FPU must be enabled.

MRC p15, #0x0, r0, c1, c0, #2

MOV r3, #0xf00000

ORR r0, r0, r3

MCR p15, #0x0, r0, c1, c0, #2

MRC p15, #0x0, r0, c0, c0

• Enable the FPU

MOV r0, #0x40000000

FMXR FPEXC, r0

You need to enable the FPU before executing the self-test on the CPU. The CPU self-test then also provides coverage for the FPU.

Regards, Sunil

Gowdham,

You may also want to review the init app note for the LS20x/10x family: www.ti.com/lit/SPNA119

Regards,

Brian

Hi Gowdham,

Where i should use this code in my program, means inside the main or before enter into main function?

>> You can use the HALCoGen tool to generate a sample code project. This will generate the required files for a typical initialization sequence as well. If you are using TMS570LS20x/10x microcontrollers, please use the HALCoGen version 2.09.000 on the DVD that came with the development kit. The version 2.10.000 available on the web does not work well with these microcontrollers.

>> The CPU starts executing code from address 0x00000000 after reset is released. This is the reset vector. The instruction at this address is usually a branch to a function called c_int00. The c_int00 function is defined in the file called sys_startup.c

You mentioned as CPU test. I never did the CPU test. Could you please tell me where we need to do the CPU test?

What's the need to do the CPU test?

>> The CPU self-test is a "proof test" for the CPU. This is a set of patterns that the CPU self-test controller runs on the CPU itself to make sure that there are no latent faults inside the CPU that are typically hard to catch when running the application code. The complete CPU self-test provides > 90% of coverage for the CPU. This is one of the key elements in order to meet any kind of safety metrics such as those defined in the IEC 61508 safety standard.

>> The CPU self-test can be run as soon as the PLL has acquired lock, so that the CPU self-test can be run at the target speed. The CPU self-test is the first key to ensuring that the other safety diagnostic circuits are working as expected, and therefore needs to be executed as soon as possible at start-up.

How this CPU test provides coverage for FPU?

>> The CPU self-test checks each functional block inside the CPU, including the floating point unit.

Is there any link or documentation is there to understand the concept?

>> The TMS570LS20216 technical reference manual (TRM, spnu489) has a chapter on the CPU Self-Test Controller. This describes the concept in brief and also includes a flow-chart that the application can follow to run the self-test.

Regards,

Sunil