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TMS570LC4357: using debugger in early init code

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Tool/software:

Hello,

I am using the TMS570LC43 launchpad with the built in XDS110 debugger and (debugging .elf with CCS). I am having trouble using the debugger in early init code. It is not generated by halcogen, but it is very similar.

For example, here's a section from the start::

ldr pc, =z_arm_reset             /*                   offset 0 */
ldr pc, =z_arm_undef_instruction /* undef instruction offset 4 */
ldr pc, =z_arm_svc               /* svc               offset 8 */
ldr pc, =z_arm_prefetch_abort    /* prefetch abort offset  0xc */
ldr pc, =z_arm_data_abort        /* data abort     offset 0x10 */


...
...
...

z_arm_reset:

    mov r0,  #0
    mov r1,  #0
    mov r2,  #0
    mov r3,  #0
    mov r4,  #0
    mov r5,  #0
    mov r6,  #0
    mov r7,  #0
    mov r8,  #0
    mov r9,  #0
    mov r10, #0
    mov r11, #0
    mov r12, #0
    mov r13, #0
    mov r14, #0
    mrs r0,  cpsr
    msr spsr_cxsf, r0

    /* FIQ mode registers */
    cps #MODE_FIQ
    mov r8,  #0         /* r8_fiq */
    mov r9,  #0         /* r9_fiq */
    mov r10, #0         /* r10_fiq */
    mov r11, #0         /* r11_fiq */
    mov r12, #0         /* r12_fiq */
    mov r13, #0         /* r13_fiq */
    mov r14, #0         /* r14_fiq */
    mrs r0,  cpsr
    msr spsr_cxsf, r0   /* spsr_fiq */

    /* IRQ mode registers */
    cps #MODE_IRQ
    mov r13, #0         /* r13_irq */
    mov r14, #0         /* r14_irq */
    mrs r0,  cpsr
    msr spsr_cxsf, r0   /* spsr_irq */

    /* ABT mode registers */
    cps #MODE_ABT
    mov r13, #0         /* r13_abt */
    mov r14, #0         /* r14_abt */
    mrs r0,  cpsr
    msr spsr_cxsf, r0   /* spsr_abt */

...
...

in the above code, I am stepping assembly and everything seems to work fine until I reach 'cps #MODE_ABT', at which point I seem to jump into an exception vector, offset = 0x04, so looks like undefined instruction exception, although it is not an undefined instruction.

If I look at DFSR and IFSR at this point, I see the following:

IFSR = 0x00000000
IFAR = 0x00000000

DFSR = 0x00000001
DFAR = 0x18F09FE5


It seems like DFSR was already set to 1 even before reaching this address. Also, the value in DFAR seems to be the memory contents of the first few dwords in the code, the vector table:

 0000 18f09fe5 18f09fe5 18f09fe5 18f09fe5  ................
 0010 18f09fe5 00f020e3 14f09fe5 14f09fe5  ...... .........
 0020 00000148 00000098 000002e8 000000dc  ...H............
 0030 0000010c 00001429 0000007d           .......)...}

I don't see any limitation of using csp instruction in debug mode. Am I missing something in trying to step through this code, is it not possible to use the debugger during early init?

(there are more variations of this same problem, but maybe this is easy to discuss as it is basically the same assembly instructions as generated by halcogen as well)