AM2434: AM234x ADC SMPL_CLK is 25MHz - Documentation says 60MHz

Hello Steve,

I am looking at your queries and you may get reply in one or two days .

Regards,

Anil.

Hello Steve,

How did you confirm your device is connected 25MHz clock to ADC ?

By default ADC is connecting to 25MHz clock only  .

If the above Register value is 0x01 then ADC clock must be 60MHz clock .

Can you please confirm what is the value of ADC clock selection Mux value in your setup ?

Please look at the Clock tree link below .

https://dev.ti.com/sysconfig/#/config/?args=--product%20%2Fmnt%2Ftirex-content%2Fsitara_ctt_1_1_1%2F.metadata%2Fproduct.json%20--device%20AM64x%20--part%20Default%20--package%20ALV%20--context%20system

Regards,

Anil.

Hi Anil,

The register is 0x00 - the same as your example.

I am using a spreadsheet to calculate the delay counts in order to achieve the ADC update rate I require (currently 1kHz across 5 channels). The only way I could get the theory to match the measured experimental rate was to use 25MHz instead of 60MHz:

Thus, I concluded that the SMPL_CLK must be 25MHz.

How can I check my clock tree setup?

Thanks, Steve

As an experiment, I set address 0x43008510 to 0x01 before powering-up the ADC, assuming this is the equivalent of MAIN_PLL1_HSDIV6_CLKOUT.

Now, the sampling is clearly faster (2.4 times), i.e., SMPL_CLK is now 60MHz.

Despite extensive searching, I can find nothing in Syscfg that would allow me to manipulate this.

Is setting the register directly correct and proper?

Thanks, Steve

Hello Steve,

Yes, your understanding is correct.

If you change the Mux selection value to 1 then  ADC will run at 60MHz only.

I have updated the above comments if the Mux selection is 0, then the clock is 25MHz and if the Mux selection is 1, ADC the clock is 60MHz.

Sorry for typo errors.

Please look at the image below.

The Mux clock selection register is a CTRL MMR. So, there is a lock and unlock mechanism for this memory location.

Once CTRL_MMR is locked , user can't change the Mux selection.

So, we can go with lock mechanism to change the clock selection and you  can try the code below.

Please go through chapter  below for more details about lock protection .

    /* set ADC clock source */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, 2);
    *(volatile uint32_t*)AddrTranslateP_getLocalAddr(0x43008510U) = 0x01;
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, 2);

Regards,

Anil.

Thank you for this information Anil - I too found it in the TRM.

However, this raises new questions:

• I was able to set the register without having to kick it - has a driver left it unlocked? (I suspect it's the EtherCAT Ind Comms)
• Should I, for best practice, manually lock The CTRL registers after boot to prevent accidental alteration?
• Why isn't the default MUX input set to HSDIV6?
• Why isn't this an ADC setting in Sysconfig? (especially as the SDK documentation repeatedly urges me to use Sysconfig)
• Are there SDK consts for the register address and settings?

Thanks for your help so far, Anil.

Steve

Hello Steve,

Steve Squires said:

• I was able to set the register without having to kick it - has a driver left it unlocked? (I suspect it's the EtherCAT Ind Comms)

Actually, the ADC clock selection register isn't controlled by EtherCAT or Ind communication protocols.

No one uses this register and there is no lock , so you are able to write it.

Steve Squires said:

• Should I, for best practice, manually lock The CTRL registers after boot to prevent accidental alteration?

Yes, your understanding is correct after the lock when the application accidently changes the value and the application can't be written.

In AM64X devices, we use this method when we are controlling CTRL_MMR Registers.

So, use the same method.

Steve Squires said:

• Why isn't the default MUX input set to HSDIV6?

Yes, in MCU+SDK most clock selection belongs to HFOSC since HFOSC is directly from crystal input.

Steve Squires said:

• Why isn't this an ADC setting in Sysconfig? (especially as the SDK documentation repeatedly urges me to use Sysconfig)
• Are there SDK consts for the register address and settings?

I will request to add this setting in system cfg in the next releases.

Yes, whatever code I have given above is available in the MCU+SDK.

You can use it directly in your application.

Regards,

Anil.