AM2432: PCIe BAR Configuration on API Reference

Hi Hideaki,

Thanks for your query.

Hideaki Matsumoto said:

PCIE_BAR_TYPE32 (32 bits BAR)

• 32-bit base address field.

Hideaki Matsumoto said:

PCIE_BAR_TYPE64 (64 bits BAR)

• 2 contiguous BARs are combined to form a 64-bit prefetchable BAR.

Hideaki Matsumoto said:

64bit can be set with mcu_plus_sdk_am243x_09_02_01_05.

Q2-Q4:

Which example you are referring here?

Can you please help me with background of your end goal or use case?

Regards

Ashwani

Hello Hideaki,

Hideaki Matsumoto said:

                            PCIE_BAR_TYPE32 (32 bits BAR)

PCIE_BAR_TYPE64 (64 bits BAR)

              Do these 32 bits and 64 bits mean data transmission size per one time ?

these refer to 32-bit vs. 64-bit wide BAR registers. A 64-bit BAR can be located anywhere in the PCIe address space, a 32-bit BAR needs to be located below 4GB.

Hideaki Matsumoto said:

Bar Configuration on Syscfg is different between each version of example.

• 64bit cannot be set with mcu_plus_sdk_am243x_09_01_00_41.
• 64bit can be set with mcu_plus_sdk_am243x_09_02_01_05.

Will it be possible to set 64bit on the next version ?

09.02.01.05 is the first version to include the extended PCIe EP driver. I can't see why this would be dropped in upcoming versions.

Hideaki Matsumoto said:

There are two types of

• PCIE_ATU_REGION_MATCH_MODE_ADDR
• PCIE_ATU_REGION_MATCH_MODE_BAR

              Which mode is set as default ?

That is a left-over in the API from previous controllers and not used within the driver. You can match incoming transactions only to BARs in EP mode.

Hideaki Matsumoto said:

Q4) BAR Number Setting

              On the Syscfg GUI, Inbound/Outbound can be set.

              How can they set a corresponding BAR number ?

The "Region Index" determines the BAR number.

Regards,

Dominic