AM2634: Clarification regarding ESM, MCRC and PBIST

Is there a chance to get some clarification in this topic?

Hi Piotr,

Piotr Orzechowski said:

ESM module allows to aggregate safety related faults, however i don't see a way to route MCRC and PBIST errors throught ESM? Is there a way to trigger ESM interrupt and set safety error pin when MCRC/PBIST triggers?

My understanding is that all the PBIST and MCRC errors are mapped ESM channels too. But from the ESM interrupt mapping table in device TRM, I didn't find PBIST and MCRC. I need to check with TRM owner .

Piotr Orzechowski said:

Can MCRC work with external flash (QSPI)?

Yes. The MCRC supports three modes: Full-CPU Mode, Half-CPU mode, and Auto Mode. The QSPI flash is not a memory mapped, you have to use the full-CPU mode to calculate CRC of data from QSPI memory. 

Piotr Orzechowski said:

n the documentation I've found: "The PBIST is a programable test engine used to apply different memory test algorithms to internal SRAM and ROM on the device

The internal OSCRAM is covered by PBIST. 

Hi,

QJ Wang said:

My understanding is that all the PBIST and MCRC errors are mapped ESM channels too. But from the ESM interrupt mapping table in device TRM, I didn't find PBIST and MCRC. I need to check with TRM owner .

Do we know more about this?

Best regards,

Piotr

Is there a way to trigger ESM interrupt and set safety error pin when MCRC/PBIST triggers?