MCU-PLUS-SDK-AM263PX: OSPI API for blocking transactions with FIFO

Tool/software:

 My application needs to store data in OSPI flash. I also want to support XiP in case the available OCRAM is not sufficient.

Use Case

In this use case:

• The memory of each task is independent; the memory sections are not shared.
• Memory is accessed by each task a independently. There is no coordination in timing between tasks. Driver code is expected to be reentrant.
• Tasks can block 100s of milliseconds waiting for the transaction to complete; there are no real time constraints.
• The status of the transaction is return by the API call.
• If the API call fails the task handles the retry,

From the OSPI driver perspective it sees multiple tasks occasionally, doing a subsector erase, followed by10 to 20 write transactions.

This may occur a few times a minute. The writes to the erased subsector will be small (16B to 32B).

FIFO 

I see there is a FIFO in the Low Level SPI protocol controller in AM263P Technical Reference Manual (SPRUJ55), Section 13. 3.2.4.1 OSPI Block Diagram.

This FIFO is appealing, because each task can simultaneously be doing transactions, and block waiting for completing, and know the status of that transaction with minimal application code.

Legacy Mode 

In the SDK documentation here:

  file:///C:/ti/mcu_plus_sdk_am263px_09_02_00_56/docs/api_guide_am263px/DRIVERS_OSPI_PAGE.html

… there is a reference to “legacy mode”.

I see “legacy mode” described in AM263P Technical Reference Manual (SPRUJ55), Section 13. 3.2.4.1 3.3.2.5.4 Using SPI Legacy Mode:

SDK Driver: 

I see in the driver here:

${MCU_PLUS_SDK_PATH}/source/board/flash/ospi/flash_nor_ospi.h

… that the API call seem to be blocking with timeouts.

Note: These are functions called for SDK examples.

Questions:

Q1a:

Can I use the flash_nor_ospi to get the ‘blocking of FIFO’ behavior that I am looking for?

Q1b:

Is using legacy mode with FIFOs?

Q1c:

Can XiP be operating concurrently without concern with the use case described above?