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AM2432: The 133rd CPU interrupt response issue

Part Number: AM2432

Tool/software:

Hello Expert,

I'm encountering an issue with test number 133 (R5FSS0_CORE0_INTR_IN_133) while testing:

In the program, enabling interrupt 133 on R50_0 core and registering a callback function works fine during normal loading. However, after performing a System Reset using CCS (whether it's at any time), upon re-loading the program and enabling the interrupt, it repeatedly enters the interrupt callback function instead of proceeding with the subsequent program execution. The issue resolves when we perform a power reset.

My test code is based on modifications made to the hello world example routine; there are no other operations involved.

void call(void *args)
{
    DebugP_log("callback\r\n");
}

void hello_world_main(void *args)
{
    /* Open drivers to open the UART driver for console */
    Drivers_open();
    Board_driversOpen();

    HwiP_Params     hwiPrms;
    HwiP_Object     cmpHwiObject;
    /* Register pin interrupt */
    HwiP_Params_init(&hwiPrms);
    hwiPrms.intNum   = 133;
    hwiPrms.priority = 1U;
    hwiPrms.callback = &call;
    hwiPrms.isPulse  = 0;
    HwiP_construct(&cmpHwiObject, &hwiPrms);

    DebugP_log("Hello World!\r\n");
}

Could you please help me analyze what might be causing this problem?

Thank you,
Best regards

Jimmy

  • Hi Jimmy,

    Thanks for your query.

    Can you please tell what version of MCU+SDK are you using? 

    Regards,

    Tushar

  • Hi Tushar,

    My version is:mcu_plus_sdk_am243x_09_00_00_35

    Best regards

    Jimmy

  • Hi Jimmy,

    Thanks for your patience.

    I will need more details on it. I have checked that the interrupt number 133 belongs to the GLUELOGIC_CBASS_INTR_OR_GLUE_MAIN_CBASS_AGG_ERR_INTR_0 interrupt which is usually caused by ECC bus error.

    Please you help us understand below.

    What boot mode are you using?

    How are you initializing the SoC?

    In the code I can see you have only registered the interrupt and it's callback, how this interrupt is getting generated?

    Regards,

    Tushar

  • Hi Tushar,

    My test project is based on the SDK's hello world example program, with only the code modified by pasting, without changing any other configuration settings.

    The boot process employs OSPI, utilizing SBL_NULL for boot guidance and using CCS to load the program.

    The triggering mechanism involves performing a system reset through CCS; after this action, upon re-running the program, it enters an interrupt state.

    Do you understand what I've described?

    Jimmy

  • Hi Jimmy,

    Thanks for sharing the above details. I have checked the above code and it is working at my end. For my case the interrupt is not getting triggered.

    Please refer below video.

    Regards,

    Tushar

  • Hi Tushar,

    Thank you for your reply.

    I have just conducted a test again, and I still encounter issues on my board. I suspect the problem might be related to the hardware changes. Could you assist me in identifying possible reasons for this interruption? I believe it's due to an error from CBASS, but since CBASS is an internal bus within the system, could external modifications affect its operation?

    In our hardware, if we connect the reset output pin of the CPU to the reset pin of the flash, is this method feasible?

    Jimmy

  • Hi Tushar,

    I tested with an AM2432 EVM, and despite the test results, there are still issues.

    Upon comparing the phenomena in the video, I noticed a difference: the main function entry address after loading the program isn't consistent. Therefore, I believe that the testing environment differs. My main function entry address is 0x7009b370.

    Here's my test setup:
    SDK: mcu_plus_sdk_am243x_09_00_00_35
    CCS:12.6.0.00008
    Hardware: AM243X EVM
    Bootloader: SBL_NULL (version from the SDK)
    Test project: hello_world_am243x-evm_r5fss0-0_freertos_ti-arm-clang

    During testing, I only added interrupt registration and callback functions; other aspects were unchanged.

    Please verify if our test environments are consistent.

    Jimmy

  • Hi Jimmy,

    When issue occurs, please follow these steps to check.

    1 Connect R5F_CORE0 to CCS

    2 Read the value of address 0x2fff0484 and check the value of bit_5 (from bit_0 :bit_5)

    3 If bit 6 is 1, write the same value to the address.

    3 They use the "system reset"  and feedback the result.

    Thanks.

    Linjun

        

  • Hi Linjun

    Here is the English translation of your text:

    I performed checks following these steps, with observations as follows:
    1. After connecting to CCS, I read that the bit5 value at address 0x2fff0484 is zero (0x2fff0480: 0x00800000, 0x2fff0484: 00000000)
    2. Upon performing a System Reset (before program loading and interrupt enable for the 133rd interrupt), 0x2fff0480 is at 0x00800020, while 0x2fff0484 remains at 00000000
    3. After loading a program and enabling the 133rd interrupt, 0x2fff0480 shifts to 0x00000020, matching with 0x2fff0484 being at 0x00000020
    4. When manually inputting a value of 0x00000020 into address 0x2fff0484, the displayed value does not change
    5. Writing a value of 0x00000020 to address 0x2fff048c results in changes as follows: 0x2fff0480 stays at 0x00000020 but 0x2fff0484 returns to 00000000

    Based on these observations, two issues seem apparent:
    1. A System Reset triggers the 133rd interrupt
    2. The 133rd interrupt is unable to be cleared

    Thank you,
    Best regards

    Jimmy

  • Hi Jimmy,

     Could you please run this script and feedback the dump log on power up and the system reset operation?

     /cfs-file/__key/communityserver-discussions-components-files/908/AM2432_5F00_vim.gel

      Thanks.

      Linjun 

  • Upon power up:

    MAIN_Cortex_R5_0_0: GEL Output: 
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x2FFF0480 : 0x00800000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x2FFF0480 : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x2FFF0484 : 0x00000000


    After System Reset:

    MAIN_Cortex_R5_0_0: GEL Output: 
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x2FFF0480 : 0x00800020
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x2FFF0480 : 0x00000020
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x2FFF0484 : 0x00000000

  • Hi Jimmy,

      Could you please use ccs dump R5F core registers here. such as FSRs FARs? Thanks.

    Linjun

      

  • Hi Linjun

    This is the extracted CBASS register.

    Upon power-up,

    521177 13
    R CBASS_DBG0_ERR_ERR_REGS_pid 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS_INFRA1_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_pid 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    


    After reset,

    521177 13
    R CBASS_DBG0_ERR_ERR_REGS_pid 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS_INFRA1_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_pid 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    


    Following the callback.

    521177 13
    R CBASS_DBG0_ERR_ERR_REGS_pid 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_DBG0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS_INFRA1_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x07000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x2FFEFFA4
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x0BB81AD4
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000004
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000001
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_pid 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_FW0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS0_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS0_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000
    

    Jimmy

  • Hi Jimmy,

     Could you please check the what's value of address 0x43000270  0x43001010, 0x43001018 and feedback?

     Thanks.

        

  • Hi Linjun

    When powered on:
    0x43000270: 00000000, 0x43001010: 00000002, 0x43001018: 00000000

    After reset:
    0x43000270: 80000000, 0x43001010: 00000002, 0x43001018: 00000000

    After entering callback:
    0x43000270: 80000000, 0x43001010: 00000002, 0x43001018: 00000000

    Jimmy

  • Jimmy,

       "0x43000270: 80000000" means the CBA debug bus error happened. 

        Could you please check the jtag reset pin status after you run the "system rest" by CCS compared the normal mode reset pin status by hardware view

        And you can have a try to set address  0x210054 to 1 to try and feedback.

         Here is my code as reference in HwiP_irq_handler_c function.

                if(isPulse==0U)
            {
                if(intNum ==133U)
                {
                  volatile *(unsigned int *)(0x210054) = 0x01;
                }
                HwiP_clearInt(intNum);
            }

      

        Thanks.

    Linjun

        

  • Hi Jimmy,

    I am able to replicate the issue at my end and working on it.

    I am checking this internally with the design team. Please allow some time to revert back.

    Regards,

    Tushar

  • Jimmy,

      please run this gel script after enter 133 interrupt and feedback.

      /cfs-file/__key/communityserver-discussions-components-files/908/Set_5F00_ctrlmmr.gel

       Thanks.

    Linjun

  • Hi Linjun

    I executed the script and printed as follows:

    After executing the script, we still encounter a 133 interrupt.

    MAIN_Cortex_R5_0_0: AM2432_ALV
    MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
    MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43002270 : 0x80000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43001024 : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43001028 : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x4300102C : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43002270 : 0x80000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43001024 : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43001028 : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x4300102C : 0x00000000
    MAIN_Cortex_R5_0_0: GEL Output: Reg_0x43001010 : 0x00000000

    Jimmy

  • Hi Jimmy,

         According the last log you capture, the CBA_DBG bus error happens when you do system reset. Check the log below, it crashed when access the address 0x2FFEFFA4, the address seems isn't accessible to AM2432. 

         Checked with internal team, the 0x43000270: 80000000 can't be reset.  BU feedback, generally, it shouldn't happen. Anyway, to resolve this error, the interrupt 133 can't end when CBA Debug bus error happened.

        Could you please Enable Debug Server Logging and capture to us?  

        About how to enable it, please refer the software-dl.ti.com/.../ccs_diagnostic-logs.html

    R CBASS_INFRA1_ERR_ERR_REGS_pid 0x0000000B 0x6600A901
    R CBASS_INFRA1_ERR_ERR_REGS_destination_id 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header0 0x0000000B 0x07000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_header1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data0 0x0000000B 0x2FFEFFA4
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data1 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data2 0x0000000B 0x0BB81AD4
    R CBASS_INFRA1_ERR_ERR_REGS_exception_logging_data3 0x0000000B 0x00000004
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_raw_stat 0x0000000B 0x00000001
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enabled_stat 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_set 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_intr_enable_clr 0x0000000B 0x00000000
    R CBASS_INFRA1_ERR_ERR_REGS_err_eoi 0x0000000B 0x00000000

      Thanks.

    Linjun

  • Hi Linjun

    I have already sent it to you via email.

    Insert ccs log here./cfs-file/__key/communityserver-discussions-components-files/908/ccs.log

    Jimmy

  • Hi Linjun,

    I am copying the last response that was there on the internal mail chain. Please find the below response.

    "Can you please rename the ctools.dll file in ccs\ccs_base\emulation\analysis\bin\, e.g. ctools.dll_bak. This will effectively disable any adv debug and trace features that would access the targets on the bus."

    Can you please update with the results?

    Regards,

    Tushar

  • Hi Tushar

    I modified according to the requirement to ctools.dll_bak and then captured the log.ccslog -240924.txt

    Jimmy

  • Hi Tushar,

       Customer report to me after they execute the funciton SOC_generateSwWarmRestMainDomian, the CBASS_ERROR status register  0x43000270 also set to 0x80000000. Could you please provide support?

       Thanks.

    Linjun

  • Hi Jimmy,

       When 133 interrupt happend as to such as injeciton instance happend, could we use "Sciclient_pmSetModuleState“ and "Sciclient_pmSetModuleRst"  to reset the R5F as a workaround to reset the interrupt souce?  Thanks.

    Linjun

  • Hi Linjun,

    Apologies, but according to the system's functional safety requirements, the system cannot self-reset while it is in normal operation; reset must be performed by the user via power cycling.

    Should a reset occur during testing, our upper-level machine will lose connection.

    Therefore, after the system begins operating normally, resets are only permitted under exceptional circumstances such as firmware updates; regular processor reset operations are not allowed.

    Thanks

    Jimmy

  • Jimmy,

        As to the CTRL_MMR0  power supply  is  controlled by LPCS_INDEX_0. So here is a possible way is just power off and power on it by MCU core. we do not use the PORZ pin. Thanks.

    Linjun

       

  • Hi Linjun,

    I understand your meaning, through MCU core resetting R5 core, but in actual operation, the R5 core is not allowed to be reset at will because important business operations are running.

    Jimmy