• State
  • Locked Locked
  • Replies 7 replies
  • Subscribers 30 subscribers
  • Views 234 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TMS570LC4357: Question regarding errorforcing mode of nERROR

TMS570LC4357: Questions regarding EKR-Register

Max Wittekind
Expert 1875 points
Part Number: TMS570LC4357

Tool/software:

Hi experts,

some of my questions were answered in the previous post, but I observed some EKR-Register behaviour that is not explained.

  1. Let's take the following situation: A test triggers nERROR and then wants to reset nERROR by writing EKR = 0x5. Immediately afterwards the SW wants to a enter a safe state (due to some other error) and wants to force nERROR = LOW. 
    According to the previous post just writing EKR = 0xA will not work. So I had the idea to just reset EKR-Register to 0 and the write 0xA. 
    Setting EKR = 0 (while EKR is still 0x5) should not reset nError, since there is no EKR = 0x5 when the LTC hits 0, correct?
  2. While playing around with nERROR and EKR I noticed the following behaviour:
    1. Writing EKR in quick succession does not seem to work. If I write EKR = 0x5 and EKR = 0x0, the second write is ignored. It seems to be the same if I write EKR = 0x0 and then EKR = 0xA .
      Can you observe the same behaviour?
    2. After nERROR is set due to an error in ESM, it should only be possible to reset nERROR by writing 0x5 to EKR. But I looks like it is also possible to write 0xA and then 0x0 to EKR and thus resetting nERROR.
      Could you check if you see the same behaviour?

Thank you and best regards,
Max

  • 0
    TI__Guru 69701 points

    Hi Max,

    Apologies for the delay, here in TI-India we got consecutive holidays.

    I am working on this issue now and will try to provide my updates ASAP.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69701 points

    Hi Max,

    My sincere apologies for the delay incurred in solving this issue. I am on vacation for last week. I will try to resolve this issue with in next two days.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69701 points

    Hi Max,

    Max Wittekind said:
    Setting EKR = 0 (while EKR is still 0x5) should not reset nError, since there is no EKR = 0x5 when the LTC hits 0, correct?

    Writing EKR=0 will not immediately force the nError safe state.

    Please look at the below highlighted red part of the waveform.

    As you can see here also EKR written 0 after the nError is in low, as you can see the nError not immediately went to the safe state that is logic high, it just reset the counter value and again a 0x5 is written to the EKR register to bring it to the normal state. If we didn't write 0x5 here, then it might still continue in low state only.

    Max Wittekind said:
    After nERROR is set due to an error in ESM, it should only be possible to reset nERROR by writing 0x5 to EKR. But I looks like it is also possible to write 0xA and then 0x0 to EKR and thus resetting nERROR.
    Could you check if you see the same behaviour

    I think this should not happen, the reset request for nERROR should only generated if we write 0x5 to the EKR register like as mentioned below:

    Max Wittekind said:
    Writing EKR in quick succession does not seem to work. If I write EKR = 0x5 and EKR = 0x0, the second write is ignored. It seems to be the same if I write EKR = 0x0 and then EKR = 0xA .

    I don't understand why you want to test these conditions. I don't understand importance of these tastings.

    For example:

    If nERROR is low then after writing EKR=0x5 the EKR will automatically come back to the 0x0 and we no need to write 0x0 again to the EKR register:

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Expert 1875 points

    Hi Jagadish,

    The reason I ask is that some of the diagnostics in the safety manual need to be run cyclically.
    If the intended result of the diagnostic is a set nERROR, we immediately write a reset request.

    The problem we have is if a real error occurs immediately after the reset request is written. We then go into a safe state and force the nERROR to be low. To do this we need to clear the reset request and make sure that nERROR stays low (by forcing it).

    Thank you and best regards,
    Max

  • 0 in reply to Max Wittekind
    TI__Guru 69701 points

    Hi Max,

    Max Wittekind said:
    The problem we have is if a real error occurs immediately after the reset request is written. We then go into a safe state and force the nERROR to be low. To do this we need to clear the reset request and make sure that nERROR stays low (by forcing it).

    As per my understanding it is not a good way to write 0x0 to the EKR register to bring the nERROR pin to the normal state.

    In ERROR forcing condition also, the below are only the better ways to reset the nERROR pin. I mean we should write EKR register with 0x5, either before LTC or after the LTC timeout.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Expert 1875 points

    Hi Jagadish,

    So TI recommends, that we wait till nERROR is reset and then switch to Error forcing mode?

  • 0 in reply to Max Wittekind
    TI__Guru 69701 points

    Hi Max,

    Max Wittekind said:
    So TI recommends, that we wait till nERROR is reset and then switch to Error forcing mode?

    You are correct!

    I mean, if we write EKR register with 0x5 then it would be better to wait till it reset.

    --
    Thanks & regards,
    Jagadish.