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Running FSI and EtherCAT slave interface - can PRUs handle both in parallel?

Manfred Pross
Prodigy 10 points
Part Number: AM2434


Tool/software:

Hi,

are the PRUs of AM243x capable of handling both, FSI communication and EtherCAT-Slave interface simultaneously?

How many FSI-interfaces in maximum may I run in this setting? One RX/TX is the minimum requirement, two would be fine. Additional RX-only paths is a plus.

Application Note "snoaa89.pdf" shows an FSI-sample implementation and it uses 4 R5F cores to feed in data to PRU0 and PRU1 (figure 1-4).

Is it possible to feed data exclusively by single M4F core (or one R5F) instead of using four R5F cores?

Requried communication cycle and data playload (can be smaller) is very similiar as described in the AN (for the first FSI). The other FSI interfaces may be running slower.

I am novice to AM243x devices, so I have no practical experience in terms of its capabilities and limitations.

Thanks and regards,

Manfred

  • 0
    TI__Genius 10505 points

    Hi,

    We are checking this internally with the experts.

    Regards,
    Aaron

  • 0
    TI__Intellectual 2060 points

    Hallo Manfred,

       AM243x has two ICSS_G subsystems with in total 12 PRU cores. EtherCAT on ICSS_G1 (as mapped on AM243x LP board) takes 2 PRU cores and is completely independent from FSI interfaces.

    FSI interfaces in general do not require PRU support and can be serviced by a single ARM core. In the app-note we describe the challenge to distribute FSI bus traffic (8 axis control) to 4 ARM cores. Your requirement is exactly the opposite - multiple FSI interfaces to single ARM core.

    Routing all FSI traffic to single ARM core is possible but you need to watch out for interrupt load as with RTOS interrupt latency can go up to 1 us.

    In case interrupt rate coming from multiple FSI interfaces is to high for single ARM core you can either distribute it to multiple ARM or use PRU on ICSS_G0 to service FSI interrupts.

    BR,

       Thomas