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Tool/software:
I'm trying to run ethercat_slave_simple_demo_am243x-lp_r5fss0-0_freertos_ti-arm-clang from ind_comms_sdk_am243x_09_02_00_08 using CCS 12.7.0 on Launchpad-AM234.
I have compiled the program and loaded the \ethercat_slave_simple_demo_am243x-lp_r5fss0-0_freertos_ti-arm-clang\Release\ethercat_slave_simple_demo_am243x-lp_r5fss0-0_freertos_ti-arm-clang.out file to the MAIN-Cortex_r5_0_0
I get the below output in the serial terminal. That's all. From another thread I know there has to be more logging messages. I would really appreciate your help.
Kind regards
Starting NULL Bootloader ...
DMSC Firmware Version 9.2.8--v09.02.08 (Kool Koala)
DMSC Firmware revision 0x9
DMSC ABI revision 3.1
INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU m4f0-0 is initialized to 400000000 Hz !!!
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runSelfCpu:217: All done, reseting self ...
Local Implementation
Pruicss max =3 selected PRU:3
Did Map 0x30080000 len 0x2000 to 0x30080000 (dram0)
Did Map 0x30082000 len 0x2000 to 0x30082000 (dram1)
Did Map 0x300b4000 len 0x4000 to 0x300b4000 (iram0)
Did Map 0x300b8000 len 0x4000 to 0x300b8000 (iram1)
Did Map 0x30090000 len 0x10000 to 0x30090000 (shdram)
Did Map 0x300a2000 len 0x400 to 0x300a2000 (control0)
Did Map 0x300a4000 len 0x400 to 0x300a4000 (control1)
Did Map 0x300a0000 len 0x2000 to 0x300a0000 (intc)
Did Map 0x300a6000 len 0x2000 to 0x300a6000 (cfg)
Did Map 0x300a8000 len 0x2000 to 0x300a8000 (uart0)
Did Map 0x300ae000 len 0x2000 to 0x300ae000 (iep)
Did Map 0x300b0000 len 0x2000 to 0x300b0000 (ecap0)
Did Map 0x300b2000 len 0x400 to 0x300b2000 (mii_rt)
Did Map 0x300b2000 len 0x1c00 to 0x300b2000 (mdio)
Phy Reset: 0.28
Phy Reset: 0.20
pRegPerm = 0x30082000, dram1=0x30082000, offset = 0x00000000, size = 0x00001400
PRU ESC: Rev 0690 | Bld 0514 | INTC base: 0x300a0000 , id = 0x4e82a900
INTC.HIDISR addr: 0x300a0038
RxPDO created 0x1600: 0x7014aa20
RxPDO created 0x1601: 0x7014ab28
TxPDO created 0x1A00: 0x7014abc0
TxPDO created 0x1A01: 0x7014acc8
EC_SLV_APP_SS_populateDescriptionObjectValues:1651 PDO Out Len: 0x40
Phy Reset: 0.28
Phy Reset: 0.20
Phy UnReset: 0.28
Phy UnReset: 0.20
Configure Phy bits: PhyAddr:3, LinPol:HIGH, PhyAddr:15, LinPol:HIGH, (0x0)
DP83869 detected
DP83869 detected
PRU_PHY_detect:185 Phy 3 alive
PRU_PHY_detect:185 Phy 15 alive
Phy 3 : Disable RGMII mode
Phy 3 : Disable GBit ANEG
Phy 15 : Disable RGMII mode
Phy 15 : Disable GBit ANEG
Phy 3 : Enable AutoMDIX
Phy 3 : Restart ANEG
Phy 3: BMSR post ANEG: 1140 ANEG:NComplete Link:No
Phy 15 : Enable AutoMDIX
Phy 15 : Restart ANEG
Phy 15: BMSR post ANEG: 1140 ANEG:NComplete Link:No
PHY Disable Magnetics
Hi Michael scheidt,
I tested the EtherCAT slave simple demo example for AM243x Launchpad from ind_comms_sdk_am243x_09_02_00_08 using CCS 12.7.0. I could not reproduce the issue you specified here. I recommend you to try with other AM243x LP boards if you have.
I have attached the screenshot of my log for your reference here.
Kind Regards,
Hi Michael scheidt,
Please share the ethercat_slave_simple_demo_am243x-lp_r5fss0-0_freertos_ti-arm-clang.out file you have built, if possible. I can test it at my end.
Kind Regards,
Hello Harsha,
Thanks for your feedback. I have only one board available. It has Rev A . What Revision has yours?
Two times this morning the system started up as expected when I used the debug version and I was able to see the device from Codesys. But for unknown reason this was then not reproducable.
I also found some more detail. The system is in endless loop within CUST_PHY_DP83869_setPowerMode function, when trying to set the Phy to power down mode. In the datasheet this bit is marked as readonly. On page 32 they write that this bit could be set.
Any idea?
Kind regards
Hi Michael scheidt,
I'm using PROC109E3B revision of the AM243 LP board.
The function CUST_PHY_DP83869_setPowerMode is used to set the power mode of PHY. This function writes to the PWD_DWN bit in BMCR reg and stay in the loop until it reads back the written bit value from PWD_DWN bit position. If it is stuck in this loop, then the problem seems to be in writing to the PHY register.
Kind Reagrds,
Hello Harsha,
I tried to upload the file by dragging and Insert. Did not work. How should I share it?
Regards
Michael
Hello Michael Scheidt,
Please click Insert and select Image/video/file. In a pop-up window click on upload and select the file you want to share and click ok.
Kind Regards,
Sorry,
I had to zip. Seems to be some security restriction on our side.
Regards
Michael
ethercat_slave_simple_demo_am243x-lp_r5fss0-0_freertos_ti-arm-clang.zip
Hello Michael Scheidt,
The binary that you have shared is working fine here at my end. I tested couple of times to ensure that the EtherCAT device is running without any problems.
Probably, the PHYs on your board have some issues it seems.
Kind Regards,
Hello Harsha,
thank you for testing. We order a new board. This takes some time unfortunately. I leave the thread open meanwhile.
Regards
Michael