MSPM0G3107: NRST Timing Chart

Hi, Kenley

For starts up, there are two conditon.

1. Vcc charge from 0 to 3V3, this is POR.

2. manually Set NRST pin to longer than 1s, this will also trigger POR.

Kenley said:

Where does the count of 1s start from?

For manually pulldown NRST, this 1s means NRST's negative pulse length.

Regards,

Helic

Hi Helic,

Sorry but could you please elaborate using the chart below ?

Thank you,

Kenley

Hi, Kenley

Figure 7-1. Power Cycle POR and BOR Conditions

This is a Vdd vs POR/BOR figure. There is no NRST pin timing here.

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NRST's 1s is under the condition that VDD is higher than BORx+, no any BOR is triggered and keep NRST low for some time (<1s or >1s), will cause BOR or POR.

Regards,

Helic

Hi Helic,

Thank you for your support.

My customer has additional questions.

At cold start (start-up), the NRST pin is in the low state.

In that case, I think it is necessary to cancel the reset once, but when should they do it?

Specifically, how many milliseconds after power-on do they need to release the reset?

Thank you,

Kenley

Hi, Kenley

Kenley said:

In that case, I think it is necessary to cancel the reset once, but when should they do it?

It's related to Vdd level, once VDD is > POR, NRST can set to high to let M0 run BOR and boot code.

For the LP-MSPM0G3507, you can refer to its user guide, there is a reset circuit as reference. (A pull-up resistor and pull-down capacitor).

Regards,

Helic