AM2632: The pointer of program runs abnormally when debugging in CCS!

I clear the epwm interrupt towards the end of the ISR and the breakpoints works fine.

But there is another problem:

I use a self nested interrupt, refer to AM2634: Does AM263 support self interrupt nesting? - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

If I clear the epwm interrupt flag at  end of the ISR,  it can't clear the epwm interrupt flag every 62.5us(the period of interrupt) when the ISR is nested. 

My interrupt service function is like this:

void HosSched_Isr(void)
{



   for(;;)
   {
       hos_uiTaskSchedCnt = (hos_uiTaskSchedCnt + 1) & 0x000f;
       hos_uiTimeTick62us++;


       HosSched_Task62us();

       // !!!! ATTENTION this task is only used by auto tuning
       // test on 125us task
       // only called if schedule counter taskSchedCnt = 1, 3, 5, 7, 9, 11, 13, 15
       if (hos_uiTaskSchedCnt & 0x0001)
       {
           HosSched_Task125us();
       }


       // test on 250us task
       // only called if schedule counter taskSchedCnt = 0, 4, 8, 12
       if ((hos_uiTaskSchedCnt & 0x0003)  == 0)
       {
           HosSched_Task250us();
       }
       else
       {
           break;
       }

       // Test if 1ms task has to be called
       // 1ms task is only called if schedule counter taskSchedCnt = 0, 1, 2, 3
       // Note: 1ms task is called only once if one of the 4 items is valid.
       //       This is achieved by the 'break' instruction in the else-path of the
       //       250us task.
       if ((hos_uiTaskSchedCnt & 0x000c)  == 0)
       {
           HosSched_Task1ms();
       }
       break;
   }

   clearPwmIntFlag();
}

If the run time of  HosSched_Task62us() and HosSched_Task125us() exceeds 62.5us, it will clear the interrupt flag once but it need two interrupts  to finish running the remaining program of HosSched_Task125us() .

That‘s  why I clear the EPWM interrupt flag at the beginning of ISR.

The self nested program test fine now. If I clear the epwm interrupt towards the end of the ISR, will there be some unexpected problem?

As longer tasks may be interrupted by subsequent interrupts, in a nested interrupt scenario such as yours -- clearing the interrupt at the end could cause longer tasks to miss subsequent interrupts

The customer application is ported from DSP2000 F2837x.  In the DSP,  the interrupt  propagation is like this:

Every time the ISR enters, these actions have been taken:

In this case, EPWM interrupt flag is cleared at the start of ISR but the debugging progress works well.

How to achieve the same outcome in AM263x? 

Hi Xiaoxue,

I talked to the experts on this, and the conclusion is:

• To hit the breakpoints during debugging you may need to clear the interrupt at the end
• But for nested interrupts clearing the interrupt at the beginning is recommended, so subsequent interrupts wouldn't miss. 

xiaoxue zhang said:

How to achieve the same outcome in AM263x? 

This is unfortunately a limitation as of now. C2000 devices have a different CPU and thus a different interrupt manager, than the R5F used in AM26x devices.

Regards,
Akshit