Part Number: AM2634
Tool/software:
Hello expert
I used CPSW to set up the TCP server and communicate with our custom host computer (TCP client). At the same time, we set PWM over 0 interrupt (20kHz), each time the interrupt is entered, the interrupt delay data (count at this time of PWM) will be saved, and transmitted to the computer through TCP. Finally, it is drawn by matlab, as shown in Fig.1 and Fig.2. The horizontal axis is time, and the vertical axis is interrupt delay (each point represents 5ns). Because the PWM clock is 200M).
The PWM interrupt in Figure 1 is set to irq, and the interrupt delay is random for both low and high priorities. The PWM interrupt in Figure 2 is set to fiq, and the interrupt delay is regular for both low and high priority, and the maximum delay is less than 1.5us.
My question is:
1.irq supports interrupt nesting, interrupt delay should not be so random after PWM is set to the highest priority.
2.fiq does not support interrupt nesting, which is intended to be reserved for PWM protection related functions, so the main control interrupt of PWM wants to implement irq with high priority. How can pwm irq have low and definite interrupt delay when using TCP?
2. About AM2634, does ti have an online discussion group that can facilitate communication?
3. How long will mdk 10.0 be released
