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LP-AM243: Understanding inter-processor communication

coderAkdr
Prodigy 210 points
Part Number: LP-AM243
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello;

I want to create my own IPC application by following the TI SDK "Understanding IPC" document and sample projects. For this, I am following the SDK document in the link below.
https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/09_02_00_50/exports/docs/api_guide_am243x/IPC_GUIDE.html

The entire process is summarized in 4 steps

  • Step 1: Enable IPC RPMessage and/or IPC Notify in SysConfig for the CPUs of interest.
  • Step 2: Update linker command file to place the shared memory sections at the right place in the memory map
  • Step 3: Mark the shared memory sections as non-cached in the MPU/MMU of the CPU. This can be done via SysConfig
  • Step 4: Start using the IPC message passing APIs

In step2: I was not able to find any linker file in the example projects which has .ld or .cmd extensions. Maybe it is possible to do this with sysconfig. Or maybe you could explain how to find it in IPC RP Message Echo example.

In step3: Also I was not able to find related menu in SysConfig about Step-3. This would be great if you help.


Is it possible for all cores to read/write to a shared memory area directly without IPC?

Best

Kadir

  • 0
    TI__Expert 7395 points

    Hi Kadir,

    coderAkdr said:
    I was not able to find any linker file in the example projects which has .ld or .cmd extensions.

    Starting from SDK v9.1, the linker command file is automatically generated using the Memory Configurator tool present as a part of the sysconfig GUI, you can read more about it here - https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/09_02_00_50/exports/docs/api_guide_am243x/MEMORY_CONFIGURATOR.html

    coderAkdr said:
    Also I was not able to find related menu in SysConfig about Step-3. This would be great if you help.

    You can find the memory regions and their respective configuration in the MPU ARMv7 tab in sysconfig as below:

    coderAkdr said:
    Is it possible for all cores to read/write to a shared memory area directly without IPC?

    If a memory region is defined as "shared memory" for all the cores then it is visible to all of them and they can read/write to it. But, without IPC you will have to make sure that the write operations are atomic, there is no memory corruption and more such complications associated with shared memory usage.

    IPC provides a synchronized mechanism with interrupts and end points between SW running across multiple CPUs, hence it is a preferred method for message exchange between CPUs.

    Regards,

    Nitika