Tool/software:
Hi Champs,
I am asking this for our customer.
The user is doing lightning testing on L1305 and find below reset causes.
Would you please help clarify what causes these two in red boxes?
That is,
0x01: PMU trim parity fault, SHUTDNSTOREx parity fault
0x15: CPULOCK violation
Is VDD fluctuating one of the causes of 0x01 and 0x15?
In TRM 2.4.1.6 Reset Cause,
Hello Wayne,
So, for the first question on "PMU Trim parity" and "SHUTDNSTOREx parity" - These are reset sources in the case of a parity mismatch on PMU trim data of the shutdown memory store (in the case the device has parity.) The TRM is written more broadly than the specific devices to cover the current and future devices in this family.
Here is a section explaining parity (if available) in the TRM:
From the datasheet, I see the MSPM0L1305 seems to only have parity on the PMU trim, not shutdown memory. PMU manages the internal regulators and the trim data is placed in memory as part of our production process. This is checking the parity of the trim data when it's being loaded on every boot. I can't currently imagine a way for a customer to cause this error without physically damaging the device.
For the second part of the question: CPULOCK: I'm pretty sure this is referring to the CPU processor lockup state. on MSPM0, CPU processor lockup always triggers a SYSRST and more details can be found in the TRM here:
Are they seeing these reset sources or are they just investigating the possible scenarios?
Either way, I hope this helps.
JD
